Lines Matching refs:l0
115 storer %l0, [base + (0 * size)] asi ; \
133 loader [base + (0 * size)] asi, %l0 ; \
418 clr %l0
2192 ldx [PCPU(CURTHREAD)], %l0
2193 ldx [%l0 + TD_PROC], %l0
2194 ldx [%l0 + P_MD + MD_UTRAP], %l0
2195 brz,pt %l0, tl0_trap
2197 ldx [%l0 + %l1], %l0
2198 brz,a,pt %l0, tl0_trap
2239 wrpr %l0, 0, %tnpc
2292 rdpr %tstate, %l0
2329 stx %l0, [%sp + SPOFF + CCFSZ + TF_TSTATE]
2342 mov PCB_REG, %l0
2349 mov %l0, PCB_REG
2382 rdpr %tstate, %l0
2416 stx %l0, [%sp + SPOFF + CCFSZ + TF_TSTATE]
2435 mov PCB_REG, %l0
2447 mov %l0, PCB_REG
2460 SET(intr_handlers, %l1, %l0)
2462 ldx [%l0 + %l1], %l1
2470 SET(pil_countp, %l1, %l0)
2472 lduh [%l0 + %l1], %l0
2473 sllx %l0, 3, %l0
2474 add %l0, %l2, %l0
2475 ldx [%l0], %l1
2477 stx %l1, [%l0]
2479 lduw [PCPU(CNT) + V_INTR], %l0
2480 inc %l0
2481 stw %l0, [PCPU(CNT) + V_INTR]
2506 ldx [PCPU(CURTHREAD)], %l0
2507 lduw [%l0 + TD_FLAGS], %l1
2565 ldx [%sp + SPOFF + CCFSZ + TF_FPRS], %l0
2604 mov %l0, %g1
2710 , %l0, %l1, %l2, 7, 8, 9)
2712 stx %l1, [%l0 + KTR_PARM1]
2713 stx %l6, [%l0 + KTR_PARM2]
2714 stx %sp, [%l0 + KTR_PARM3]
2775 rdpr %tstate, %l0
2805 stx %l0, [%sp + SPOFF + CCFSZ + TF_TSTATE]
2811 mov PCB_REG, %l0
2818 mov %l0, PCB_REG
2858 ldx [%sp + SPOFF + CCFSZ + TF_TSTATE], %l0
2880 andn %l0, TSTATE_CWP_MASK, %g1
2918 rdpr %tstate, %l0
2946 stx %l0, [%sp + SPOFF + CCFSZ + TF_TSTATE]
3008 andn %l0, TSTATE_CWP_MASK, %g1
3063 mov %l0, %o0