Lines Matching refs:r2
42 #define ATR(desc, r1, r2, r3, l1, l2) \
46 SET(ktr_idx, r2, r1) ; \
47 lduw [r1], r2 ; \
48 l2: add r2, 1, r3 ; \
52 casa [r1] ASI_N, r2, r3 ; \
53 cmp r2, r3 ; \
55 mov r3, r2 ; \
58 mulx r2, KTR_SIZEOF, r2 ; \
59 add r1, r2, r1 ; \
60 rd %tick, r2 ; \
61 stx r2, [r1 + KTR_TIMESTAMP] ; \
62 lduw [PCPU(CPUID)], r2 ; \
63 stw r2, [r1 + KTR_CPU] ; \
66 SET(l1 ## b, r3, r2) ; \
67 stx r2, [r1 + KTR_DESC]
69 #define CATR(mask, desc, r1, r2, r3, l1, l2, l3) \
71 setx ktr_mask, r3, r2 ; \
72 ldx [r2], r2 ; \
73 and r2, r1, r1 ; \
76 lduw [PCPU(CPUID)], r2 ; \
78 udivx r2, r3, r2 ; \
79 srl r2, 0, r2 ; \
80 sllx r2, PTR_SHIFT, r2 ; \
82 ldx [r1 + r2], r1 ; \
83 lduw [PCPU(CPUID)], r2 ; \
85 udivx r2, r3, r2 ; \
86 srl r2, 0, r2 ; \
87 smul r2, r3, r3 ; \
88 lduw [PCPU(CPUID)], r2 ; \
89 sub r2, r3, r3 ; \
90 mov 1, r2 ; \
91 sllx r2, r3, r2 ; \
92 andn r1, r2, r1 ; \
95 ATR(desc, r1, r2, r3, l1, l2)