powerpc/booke/trap_subr.S

118 	stw	%r31, (savearea+CPUSAVE_R31)(%r1); 			\
120 	mfesr	%r31;							\
122 	stw	%r31, (savearea+CPUSAVE_BOOKE_ESR)(%r1); 		\
124 	mfspr	%r31, isrr1;	 	/* MSR at interrupt time */	\
126 	stw	%r31, (savearea+CPUSAVE_SRR1)(%r1);			\
131 	mtcr	%r31;			/* MSR at interrupt time  */	\
141 	stw	%r31, (savearea+CPUSAVE_R31)(%r1);			\
143 	mfesr	%r31;							\
145 	stw	%r31, (savearea+CPUSAVE_BOOKE_ESR)(%r1);		\
147 	mfspr	%r31, isrr1;		/* MSR at interrupt time */	\
149 	stw	%r31, (savearea+CPUSAVE_SRR1)(%r1);			\
151 	mfspr	%r31, SPR_SRR1;		/* MSR at interrupt time */	\
153 	stw	%r31, (savearea+CPUSAVE_SRR1+8)(%r1);			\
158 	mtcr	%r31;			/* MSR at interrupt time  */	\
167  *	savearea	r30-r31, DEAR, ESR, xSRR0-1
169  *	r31		scratch
189 	mfspr	%r31, sprg_sp;		/* get saved SP */		\
191 	stwu	%r31, -FRAMELEN(%r1);					\
193 	stw	%r31, FRAME_1+8(%r1);	/* save SP   "      "       */	\
195 	mflr	%r31;		 					\
196 	stw	%r31, FRAME_LR+8(%r1);	/* save LR   "      "       */	\
200 	lwz	%r31, (savearea+CPUSAVE_R31)(%r2); /* get saved r31 */	\
220 	lwz	%r31, (savearea+CPUSAVE_SRR1)(%r2);			\
222 	stw	%r31, FRAME_SRR1+8(%r1);				\
248 	lwz	%r31, FRAME_SRR1+8(%r1);				\
250 	mtspr	isrr1, %r31;						\
286 	mfcr	%r31;							\
288 	stw	%r31, (TLBSAVE_BOOKE_CR)(%r1);				\
291 	mfsrr1	%r31;		/* MSR at interrupt time*/		\
293 	stw	%r31, (TLBSAVE_BOOKE_SRR1)(%r1);	/* save SRR1 */	\
315 	lwz	%r31, (TLBSAVE_BOOKE_CR)(%r1);				\
317 	mtcr	%r31;							\
320 	lwz	%r31, (TLBSAVE_BOOKE_SRR1)(%r1);			\
322 	mtsrr1	%r31;							\
552  *	r31 - dear
566 	mfdear	%r31
579 	cmplw	cr0, %r31, %r21
653  * input: r31 - dear
663 	srwi	%r21, %r31, PDIR_SHIFT		/* pdir offset */
678 	and	%r21, %r21, %r31
770 	mfsrr0	%r31			/* faulting address */
881 	stw	%r31, (PC_DBSAVE+CPUSAVE_R31)(%r3)
883 	mflr	%r31
884 	mtsrr0	%r31
887 	mfesr	%r31
889 	stw	%r31, (PC_DBSAVE+CPUSAVE_BOOKE_ESR)(%r3)
892 	mfsrr1	%r31
894 	stw	%r31, (PC_DBSAVE+CPUSAVE_SRR1)(%r3)