Lines Matching refs:MIPS_RW32_COP0_SEL
208 #define MIPS_RW32_COP0_SEL(n,r,s) \
245 MIPS_RW32_COP0_SEL(config1, MIPS_COP_0_CONFIG, 1);
246 MIPS_RW32_COP0_SEL(config2, MIPS_COP_0_CONFIG, 2);
247 MIPS_RW32_COP0_SEL(config3, MIPS_COP_0_CONFIG, 3);
249 MIPS_RW32_COP0_SEL(config4, MIPS_COP_0_CONFIG, 4);
252 MIPS_RW32_COP0_SEL(config5, MIPS_COP_0_CONFIG, 5);
255 MIPS_RW32_COP0_SEL(config6, MIPS_COP_0_CONFIG, 6);
258 MIPS_RW32_COP0_SEL(config7, MIPS_COP_0_CONFIG, 7);
268 MIPS_RW32_COP0_SEL(cmgcrbase, 15, 3);
276 MIPS_RW32_COP0_SEL(pagegrain, MIPS_COP_0_TLB_PG_MASK, 1);
284 MIPS_RW32_COP0_SEL(ebase, MIPS_COP_0_PRID, 1);
286 MIPS_RW32_COP0_SEL(watchlo1, MIPS_COP_0_WATCH_LO, 1);
287 MIPS_RW32_COP0_SEL(watchlo2, MIPS_COP_0_WATCH_LO, 2);
288 MIPS_RW32_COP0_SEL(watchlo3, MIPS_COP_0_WATCH_LO, 3);
290 MIPS_RW32_COP0_SEL(watchhi1, MIPS_COP_0_WATCH_HI, 1);
291 MIPS_RW32_COP0_SEL(watchhi2, MIPS_COP_0_WATCH_HI, 2);
292 MIPS_RW32_COP0_SEL(watchhi3, MIPS_COP_0_WATCH_HI, 3);
294 MIPS_RW32_COP0_SEL(perfcnt0, MIPS_COP_0_PERFCNT, 0);
295 MIPS_RW32_COP0_SEL(perfcnt1, MIPS_COP_0_PERFCNT, 1);
296 MIPS_RW32_COP0_SEL(perfcnt2, MIPS_COP_0_PERFCNT, 2);
297 MIPS_RW32_COP0_SEL(perfcnt3, MIPS_COP_0_PERFCNT, 3);
300 #undef MIPS_RW32_COP0_SEL