Lines Matching refs:data0
44 * @data0: Buffer to return data 0 register contents
58 u64 *data0,
64 vxge_assert((vpath_reg != NULL) && (data0 != NULL) && (data1 != NULL));
72 "param_index = %lld, data0 = 0x"VXGE_OS_STXFMT", "
75 (ptr_t) data0, (ptr_t) data1);
133 *data0 = vxge_os_pio_mem_read64(pdev, regh0,
2724 u64 data0, data1;
2748 &data0,
2753 data0 &= ~VXGE_HAL_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_EN;
2760 data0))
2761 data0 = 0;
2763 data0 = VXGE_HAL_RTS_ACCESS_STEER_DATA0_RTH_GEN_ACTIVE_TABLE;
2766 data0 &= VXGE_HAL_RTS_ACCESS_STEER_DATA0_RTH_GEN_ACTIVE_TABLE;
2770 data0 |= VXGE_HAL_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_EN |
2775 data0 |=
2779 data0 |= VXGE_HAL_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_IPV4_EN;
2782 data0 |=
2786 data0 |= VXGE_HAL_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_IPV6_EN;
2789 data0 |=
2793 data0 |= VXGE_HAL_RTS_ACCESS_STEER_DATA0_RTH_GEN_RTH_IPV6_EX_EN;
2801 data0,
3311 u64 data0;
3335 data0 = VXGE_HAL_RTS_ACCESS_STEER_DATA0_RTH_SOLO_IT_BUCKET_DATA(
3342 data0,
3359 data0 = VXGE_HAL_RTS_ACCESS_STEER_DATA0_RTH_SOLO_IT_ENTRY_EN |
3365 j, data0, data1);
3389 data0 =
3418 data0,
3461 u64 data0;
3489 &data0,
3501 if ((u8) VXGE_HAL_RTS_ACCESS_STEER_DATA0_GET_RTH_SOLO_IT_ENTRY_EN(data0)) {
3512 data0 = 0;
3516 data0 =
3520 data0 |= VXGE_HAL_RTS_ACCESS_STEER_DATA0_RTH_ITEM1_BUCKET_NUM(j + 1);
3532 0, &data0, &data1);
3545 VXGE_HAL_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM0_ENTRY_EN(data0)) {
3554 VXGE_HAL_RTS_ACCESS_STEER_DATA0_GET_RTH_ITEM1_ENTRY_EN(data0)) {
3599 u64 data0, data1;
3622 data0 = 0;
3629 data0,
3646 data0 =
3658 data0,
11398 u64 data0, u64 data1)
11413 hldev->header.regh0, data0,
11466 u64 data0 = 0x0, data1 = 0x0;
11479 data0 = VXGE_HAL_RTS_ACCESS_STEER_DATA0_SET_NWIF_CMD(cmd) | req_config;
11482 status = vxge_hal_set_fw_api(devh, 0, action, 0x0, data0, data1);
11503 u64 data0 = 0x0, data1 = 0x0;
11515 data0 = VXGE_HAL_RTS_ACCESS_STEER_DATA0_SET_NWIF_CMD(cmd);
11519 status = vxge_hal_set_fw_api(devh, 0, action, 0x0, data0, data1);
11534 u64 data0 = 0x0, data1 = 0x0;
11547 data0 = VXGE_HAL_RTS_ACCESS_STEER_DATA0_SET_NWIF_CMD(cmd);
11551 status = vxge_hal_set_fw_api(devh, 0, action, 0x0, data0, data1);
11561 u64 data0 = 0x0, data1 = 0x0;
11574 data0 = VXGE_HAL_RTS_ACCESS_STEER_DATA0_SET_NWIF_CMD(cmd);
11578 status = vxge_hal_set_fw_api(devh, 0, action, 0x0, data0, data1);
11621 u64 val64, data0;
11631 data0 = func_mode;
11634 status = vxge_hal_set_fw_api(devh, vp_id, action, 0x0, data0, 0x0);
11651 u64 data0 = 0x0, data1 = 0x0;
11656 data0 = VXGE_HAL_RTS_ACCESS_STEER_DATA0_SET_NWIF_CMD(cmd);
11659 status = vxge_hal_set_fw_api(devh, 0, action, 0x0, data0, data1);
11669 u64 data0 = 0x0;
11677 data0 = VXGE_HAL_RTS_ACCESS_STEER_DATA0_VFID(vf_id) |
11681 status = vxge_hal_set_fw_api(devh, 0, action, 0x0, data0, 0x0);
11684 data0 = vxge_os_pio_mem_read64(hldev->header.pdev,
11688 *num_vp = (u32) ((data0 >> 16) & 0xFF);
11725 u64 data0 = 0x0, data1 = 0x0;
11745 data0 = 1;
11746 data0 |= vp_id << 32;
11748 status = vxge_hal_set_fw_api(devh, 0, action, 0x0, data0, data1);
11757 data0 = 0;
11758 data0 |= vp_id << 32;
11780 0x0, data0, data1);
11789 u64 data0 = 0x0, data1 = 0x0;
11809 data0 = 1;
11810 data0 |= vp_id << 32;
11812 status = vxge_hal_set_fw_api(devh, 0, action, 0x0, data0, data1);
11821 data0 = 0;
11822 data0 |= vp_id << 32;
11843 0x0, data0, data1);
11854 u64 data0 = 0x0, data1 = 0x0;
11864 data0 = 1;
11865 data0 |= vp_id << 32;
11867 status = vxge_hal_set_fw_api(devh, 0, action, 0x0, data0, data1);
11892 u64 data0 = 0x0, data1 = 0x0;
11902 data0 = 3;
11903 data0 |= func_id << 32;
11905 status = vxge_hal_set_fw_api(devh, func_id, action, 0x0, data0, data1);
12113 u64 data0 = 0x0, data1 = 0x0;
12117 data0 = VXGE_HAL_RTS_ACCESS_STEER_DATA0_SEND_MSG_TYPE(msg_type) |
12126 data0, data1);
12139 *msg_sent_to_vpaths = data0 & VXGE_HAL_MSG_SEND_TO_VPATH_MASK;