Lines Matching refs:vdev
100 vxge_dev_t *vdev;
108 vdev = (vxge_dev_t *) device_get_softc(ndev);
109 if (!vdev)
112 bzero(vdev, sizeof(vxge_dev_t));
114 vdev->ndev = ndev;
115 strlcpy(vdev->ndev_name, "vxge", sizeof(vdev->ndev_name));
117 err = vxge_driver_config(vdev);
122 status = vxge_driver_init(vdev);
124 device_printf(vdev->ndev, "Failed to initialize driver\n");
131 err = vxge_alloc_resources(vdev);
133 device_printf(vdev->ndev, "resource allocation failed\n");
137 err = vxge_device_hw_info_get(vdev);
144 vxge_hal_device_config_default_get(vdev->device_config);
147 vxge_vpath_config(vdev);
150 err = vxge_alloc_isr_resources(vdev);
153 device_printf(vdev->ndev, "isr resource allocation failed\n");
158 device_attr.bar0 = (u8 *) vdev->pdev->bar_info[0];
159 device_attr.bar1 = (u8 *) vdev->pdev->bar_info[1];
160 device_attr.bar2 = (u8 *) vdev->pdev->bar_info[2];
161 device_attr.regh0 = (vxge_bus_res_t *) vdev->pdev->reg_map[0];
162 device_attr.regh1 = (vxge_bus_res_t *) vdev->pdev->reg_map[1];
163 device_attr.regh2 = (vxge_bus_res_t *) vdev->pdev->reg_map[2];
164 device_attr.irqh = (pci_irq_h) vdev->config.isr_info[0].irq_handle;
165 device_attr.cfgh = vdev->pdev;
166 device_attr.pdev = vdev->pdev;
170 &device_attr, vdev->device_config);
173 device_printf(vdev->ndev, "hal device initialization failed\n");
177 vdev->devh = hldev;
178 vxge_hal_device_private_set(hldev, vdev);
180 if (vdev->is_privilaged) {
181 err = vxge_firmware_verify(vdev);
190 vdev->vpaths = (vxge_vpath_t *)
191 vxge_mem_alloc(vdev->no_of_vpath * sizeof(vxge_vpath_t));
193 if (vdev->vpaths == NULL) {
195 device_printf(vdev->ndev, "vpath memory allocation failed\n");
199 vdev->no_of_func = 1;
200 if (vdev->is_privilaged) {
202 vxge_hal_func_mode_count(vdev->devh,
203 vdev->config.hw_info.function_mode, &vdev->no_of_func);
205 vxge_bw_priority_config(vdev);
209 vxge_mutex_init(vdev);
212 vxge_media_init(vdev);
217 device_printf(vdev->ndev, "setting up interface failed\n");
221 err = vxge_isr_setup(vdev);
224 device_printf(vdev->ndev,
228 vxge_device_hw_info_print(vdev);
229 vdev->is_active = TRUE;
248 vxge_dev_t *vdev;
250 vdev = (vxge_dev_t *) device_get_softc(ndev);
251 if (vdev->is_active) {
252 vdev->is_active = FALSE;
253 vxge_stop(vdev);
267 vxge_dev_t *vdev = (vxge_dev_t *) device_get_softc(ndev);
268 vxge_stop(vdev);
279 vxge_dev_t *vdev = (vxge_dev_t *) vdev_ptr;
281 VXGE_DRV_LOCK(vdev);
282 vxge_init_locked(vdev);
283 VXGE_DRV_UNLOCK(vdev);
291 vxge_init_locked(vxge_dev_t *vdev)
294 vxge_hal_device_t *hldev = vdev->devh;
298 ifnet_t ifp = vdev->ifp;
304 VXGE_DRV_LOCK_ASSERT(vdev);
307 err = vxge_vpath_open(vdev);
311 if (vdev->config.rth_enable) {
312 status = vxge_rth_config(vdev);
317 for (i = 0; i < vdev->no_of_vpath; i++) {
318 vpath_handle = vxge_vpath_handle_get(vdev, i);
325 device_printf(vdev->ndev,
332 device_printf(vdev->ndev,
341 device_printf(vdev->ndev, "failed to enable device\n");
345 if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX)
346 vxge_msix_enable(vdev);
356 for (i = 0; i < vdev->no_of_vpath; i++) {
357 vpath_handle = vxge_vpath_handle_get(vdev, i);
367 device_printf(vdev->ndev,
372 vxge_hal_device_intr_enable(vdev->devh);
374 for (i = 0; i < vdev->no_of_vpath; i++) {
375 vpath_handle = vxge_vpath_handle_get(vdev, i);
379 bzero(&(vdev->vpaths[i].driver_stats),
389 vdev->is_initialized = TRUE;
398 vxge_hal_device_intr_disable(vdev->devh);
402 vxge_vpath_close(vdev);
413 vxge_driver_init(vxge_dev_t *vdev)
433 device_printf(vdev->ndev,
449 vxge_driver_config(vxge_dev_t *vdev)
456 VXGE_GET_PARAM("hint.vxge.0.no_of_vpath", vdev->config,
459 if (vdev->config.no_of_vpath == VXGE_DEFAULT_USER_HARDCODED)
460 vdev->config.no_of_vpath = mp_ncpus;
462 if (vdev->config.no_of_vpath <= 0) {
464 device_printf(vdev->ndev,
470 VXGE_GET_PARAM("hint.vxge.0.intr_coalesce", vdev->config,
473 VXGE_GET_PARAM("hint.vxge.0.rth_enable", vdev->config,
476 VXGE_GET_PARAM("hint.vxge.0.rth_bkt_sz", vdev->config,
479 VXGE_GET_PARAM("hint.vxge.0.lro_enable", vdev->config,
482 VXGE_GET_PARAM("hint.vxge.0.tso_enable", vdev->config,
485 VXGE_GET_PARAM("hint.vxge.0.tx_steering", vdev->config,
488 VXGE_GET_PARAM("hint.vxge.0.msix_enable", vdev->config,
491 VXGE_GET_PARAM("hint.vxge.0.ifqmaxlen", vdev->config,
494 VXGE_GET_PARAM("hint.vxge.0.port_mode", vdev->config,
497 if (vdev->config.port_mode == VXGE_DEFAULT_USER_HARDCODED)
498 vdev->config.port_mode = VXGE_DEFAULT_CONFIG_VALUE;
500 VXGE_GET_PARAM("hint.vxge.0.l2_switch", vdev->config,
503 if (vdev->config.l2_switch == VXGE_DEFAULT_USER_HARDCODED)
504 vdev->config.l2_switch = VXGE_DEFAULT_CONFIG_VALUE;
506 VXGE_GET_PARAM("hint.vxge.0.fw_upgrade", vdev->config,
509 VXGE_GET_PARAM("hint.vxge.0.low_latency", vdev->config,
512 VXGE_GET_PARAM("hint.vxge.0.func_mode", vdev->config,
515 if (vdev->config.function_mode == VXGE_DEFAULT_USER_HARDCODED)
516 vdev->config.function_mode = VXGE_DEFAULT_CONFIG_VALUE;
518 if (!(is_multi_func(vdev->config.function_mode) ||
519 is_single_func(vdev->config.function_mode)))
520 vdev->config.function_mode = VXGE_DEFAULT_CONFIG_VALUE;
540 vxge_os_memcpy(&vdev->config.bw_info[i], &bw_info,
552 vxge_stop(vxge_dev_t *vdev)
554 VXGE_DRV_LOCK(vdev);
555 vxge_stop_locked(vdev);
556 VXGE_DRV_UNLOCK(vdev);
565 vxge_stop_locked(vxge_dev_t *vdev)
569 vxge_hal_device_t *hldev = vdev->devh;
570 ifnet_t ifp = vdev->ifp;
572 VXGE_DRV_LOCK_ASSERT(vdev);
579 vdev->is_initialized = FALSE;
591 device_printf(vdev->ndev,
596 vxge_vpath_reset(vdev);
601 vxge_vpath_close(vdev);
608 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
610 vpath = &(vdev->vpaths[0]);
624 vxge_dev_t *vdev = vpath->vdev;
628 if ((!vdev->is_initialized) ||
660 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
662 if (vdev->config.tx_steering) {
663 i = vxge_vpath_get(vdev, m_head);
665 i = m_head->m_pkthdr.flowid % vdev->no_of_vpath;
668 vpath = &(vdev->vpaths[i]);
683 vxge_dev_t *vdev = vpath->vdev;
687 if ((!vdev->is_initialized) ||
736 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
738 for (i = 0; i < vdev->no_of_vpath; i++) {
739 vpath = &(vdev->vpaths[i]);
766 vxge_dev_t *vdev = vpath->vdev;
848 if ((vxge_hal_device_check_id(vdev->devh) == VXGE_HAL_CARD_TITAN_1A) &&
849 (vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 0)))
891 vxge_dev_t *vdev = vpath->vdev;
893 ifnet_t ifp = vdev->ifp;
905 device_printf(vdev->ndev, "tx transfer code %d\n",
998 vxge_dev_t *vdev = vpath->vdev;
1003 ifnet_t ifp = vdev->ifp;
1189 vxge_dev_t *vdev = vpath->vdev;
1191 mbuf_pkt = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, vdev->rx_mbuf_sz);
1195 device_printf(vdev->ndev, "out of memory to allocate mbuf\n");
1200 mbuf_pkt->m_len = vdev->rx_mbuf_sz;
1201 mbuf_pkt->m_pkthdr.len = vdev->rx_mbuf_sz;
1202 mbuf_pkt->m_pkthdr.rcvif = vdev->ifp;
1230 vxge_hal_ring_rxd_1b_set(rxdh, rxd_priv->dma_addr[0], vdev->rx_mbuf_sz);
1248 vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1249 hw_info = &vdev->config.hw_info;
1251 ifnet_t ifp = vdev->ifp;
1253 if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1254 for (i = 0; i < vdev->no_of_vpath; i++) {
1255 vpath = &(vdev->vpaths[i]);
1261 if (vdev->is_privilaged && (hw_info->ports > 1)) {
1262 vxge_active_port_update(vdev);
1263 device_printf(vdev->ndev,
1264 "Active Port : %lld\n", vdev->active_port);
1281 vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1283 ifnet_t ifp = vdev->ifp;
1285 if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1286 for (i = 0; i < vdev->no_of_vpath; i++) {
1287 vpath = &(vdev->vpaths[i]);
1301 vxge_reset(vxge_dev_t *vdev)
1303 if (!vdev->is_initialized)
1306 VXGE_DRV_LOCK(vdev);
1307 vxge_stop_locked(vdev);
1308 vxge_init_locked(vdev);
1309 VXGE_DRV_UNLOCK(vdev);
1321 vxge_dev_t *vdev = (vxge_dev_t *) userdata;
1322 ifnet_t ifp = vdev->ifp;
1328 vxge_hal_device_intr_disable(vdev->devh);
1346 vxge_dev_t *vdev = (vxge_dev_t *) device_get_softc(ndev);
1349 if (!bVAL1(vdev->config.hw_info.vpath_mask, i))
1352 if (j >= vdev->no_of_vpath)
1355 vdev->vpaths[j].vp_id = i;
1356 vdev->vpaths[j].vp_index = j;
1357 vdev->vpaths[j].vdev = vdev;
1358 vdev->vpaths[j].is_configured = TRUE;
1360 vxge_os_memcpy((u8 *) vdev->vpaths[j].mac_addr,
1361 (u8 *) (vdev->config.hw_info.mac_addrs[i]),
1369 device_printf(vdev->ndev,
1374 vdev->ifp = ifp;
1381 ifp->if_softc = vdev;
1390 ifp->if_snd.ifq_drv_maxlen = max(vdev->config.ifq_maxlen, ifqmaxlen);
1400 if (vdev->config.tso_enable)
1401 vxge_tso_config(vdev);
1403 if (vdev->config.lro_enable)
1408 strlcpy(vdev->ndev_name, device_get_nameunit(ndev),
1409 sizeof(vdev->ndev_name));
1412 ether_ifattach(ifp, vdev->vpaths[0].mac_addr);
1423 vxge_isr_setup(vxge_dev_t *vdev)
1431 switch (vdev->config.intr_mode) {
1433 err = bus_setup_intr(vdev->ndev,
1434 vdev->config.isr_info[0].irq_res,
1436 vxge_isr_filter, vxge_isr_line, vdev,
1437 &vdev->config.isr_info[0].irq_handle);
1441 for (i = 0; i < vdev->intr_count; i++) {
1443 irq_rid = vdev->config.isr_info[i].irq_rid;
1444 vpath = &vdev->vpaths[irq_rid / 4];
1455 err = bus_setup_intr(vdev->ndev,
1456 vdev->config.isr_info[i].irq_res,
1459 &vdev->config.isr_info[i].irq_handle);
1467 bus_teardown_intr(vdev->ndev,
1468 vdev->config.isr_info[i].irq_res,
1469 vdev->config.isr_info[i].irq_handle);
1485 vxge_dev_t *vdev = (vxge_dev_t *) handle;
1486 __hal_device_t *hldev = (__hal_device_t *) vdev->devh;
1491 val64 = vxge_os_pio_mem_read64(vdev->pdev, (vdev->devh)->regh0,
1504 vxge_dev_t *vdev = (vxge_dev_t *) vdev_ptr;
1506 vxge_hal_device_handle_irq(vdev->devh, 0);
1517 vxge_dev_t *vdev = vpath->vdev;
1521 VXGE_HAL_DEVICE_STATS_SW_INFO_TRAFFIC_INTR(vdev->devh);
1544 vxge_dev_t *vdev = vpath->vdev;
1546 VXGE_HAL_DEVICE_STATS_SW_INFO_NOT_TRAFFIC_INTR(vdev->devh);
1549 for (i = 0; i < vdev->no_of_vpath; i++) {
1551 vpath = &(vdev->vpaths[i]);
1557 device_printf(vdev->ndev,
1562 vdev->is_initialized = FALSE;
1574 vxge_msix_enable(vxge_dev_t *vdev)
1587 for (i = 0; i < vdev->no_of_vpath; i++) {
1589 vpath = vdev->vpaths + i;
1590 first_vp_id = vdev->vpaths[0].vp_id;
1602 device_printf(vdev->ndev,
1620 vxge_media_init(vxge_dev_t *vdev)
1622 ifmedia_init(&vdev->media,
1626 ifmedia_add(&vdev->media,
1627 IFM_ETHER | vdev->ifm_optics | IFM_FDX,
1631 ifmedia_add(&vdev->media, IFM_ETHER | IFM_AUTO, 0, NULL);
1632 ifmedia_set(&vdev->media, IFM_ETHER | IFM_AUTO);
1642 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
1643 vxge_hal_device_t *hldev = vdev->devh;
1651 ifmr->ifm_active |= vdev->ifm_optics | IFM_FDX;
1663 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
1664 struct ifmedia *ifmediap = &vdev->media;
1673 vxge_alloc_resources(vxge_dev_t *vdev)
1679 device_t ndev = vdev->ndev;
1682 vdev->device_config = (vxge_hal_device_config_t *)
1685 if (!vdev->device_config) {
1688 device_printf(vdev->ndev,
1698 device_printf(vdev->ndev,
1703 vdev->pdev = pci_info;
1705 err = vxge_alloc_bar_resources(vdev, 0);
1711 err = vxge_alloc_bar_resources(vdev, 1);
1717 err = vxge_alloc_bar_resources(vdev, 2);
1733 vxge_alloc_bar_resources(vxge_dev_t *vdev, int i)
1737 vxge_pci_info_t *pci_info = vdev->pdev;
1742 bus_alloc_resource_any(vdev->ndev,
1746 device_printf(vdev->ndev,
1756 device_printf(vdev->ndev,
1782 vxge_alloc_isr_resources(vxge_dev_t *vdev)
1789 if (vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) {
1791 intr_count = pci_msix_count(vdev->ndev);
1794 msix_vec_reqd = 4 * vdev->no_of_vpath;
1798 err = pci_alloc_msix(vdev->ndev, &intr_count);
1804 device_printf(vdev->ndev, "Unable to allocate "
1811 vdev->intr_count = 0;
1812 vdev->config.intr_mode = intr_mode;
1814 switch (vdev->config.intr_mode) {
1816 vdev->config.isr_info[0].irq_rid = 0;
1817 vdev->config.isr_info[0].irq_res =
1818 bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1819 &vdev->config.isr_info[0].irq_rid,
1822 if (vdev->config.isr_info[0].irq_res == NULL) {
1823 device_printf(vdev->ndev,
1828 vdev->intr_count++;
1833 for (i = 0; i < vdev->no_of_vpath; i++) {
1836 vdev->config.isr_info[msix_count].irq_rid = irq_rid + 2;
1837 vdev->config.isr_info[msix_count].irq_res =
1838 bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1839 &vdev->config.isr_info[msix_count].irq_rid,
1842 if (vdev->config.isr_info[msix_count].irq_res == NULL) {
1843 device_printf(vdev->ndev,
1845 vdev->config.isr_info[msix_count].irq_rid);
1850 vdev->intr_count++;
1851 err = bus_bind_intr(vdev->ndev,
1852 vdev->config.isr_info[msix_count].irq_res,
1860 vdev->config.isr_info[msix_count].irq_rid = 3;
1861 vdev->config.isr_info[msix_count].irq_res =
1862 bus_alloc_resource_any(vdev->ndev, SYS_RES_IRQ,
1863 &vdev->config.isr_info[msix_count].irq_rid,
1866 if (vdev->config.isr_info[msix_count].irq_res == NULL) {
1867 device_printf(vdev->ndev,
1869 vdev->config.isr_info[msix_count].irq_rid);
1874 vdev->intr_count++;
1875 err = bus_bind_intr(vdev->ndev,
1876 vdev->config.isr_info[msix_count].irq_res, (i % mp_ncpus));
1881 vdev->device_config->intr_mode = vdev->config.intr_mode;
1895 vxge_dev_t *vdev;
1897 vdev = (vxge_dev_t *) device_get_softc(ndev);
1901 for (i = 0; i < vdev->intr_count; i++) {
1903 vdev->config.isr_info[i].irq_res,
1904 vdev->config.isr_info[i].irq_handle);
1909 ether_ifdetach(vdev->ifp);
1911 if_free(vdev->ifp);
1915 ifmedia_removeall(&vdev->media);
1919 vxge_mutex_destroy(vdev);
1923 vxge_mem_free(vdev->vpaths,
1924 vdev->no_of_vpath * sizeof(vxge_vpath_t));
1928 if (vdev->devh != NULL) {
1929 vxge_hal_device_private_set(vdev->devh, 0);
1930 vxge_hal_device_terminate(vdev->devh);
1935 vxge_free_isr_resources(vdev);
1939 vxge_free_bar_resources(vdev, 2);
1943 vxge_free_bar_resources(vdev, 1);
1947 vxge_free_bar_resources(vdev, 0);
1951 vxge_mem_free(vdev->pdev, sizeof(vxge_pci_info_t));
1955 vxge_mem_free(vdev->device_config,
1979 vxge_free_isr_resources(vxge_dev_t *vdev)
1983 switch (vdev->config.intr_mode) {
1985 if (vdev->config.isr_info[0].irq_res) {
1986 bus_release_resource(vdev->ndev, SYS_RES_IRQ,
1987 vdev->config.isr_info[0].irq_rid,
1988 vdev->config.isr_info[0].irq_res);
1990 vdev->config.isr_info[0].irq_res = NULL;
1995 for (i = 0; i < vdev->intr_count; i++) {
1996 if (vdev->config.isr_info[i].irq_res) {
1997 bus_release_resource(vdev->ndev, SYS_RES_IRQ,
1998 vdev->config.isr_info[i].irq_rid,
1999 vdev->config.isr_info[i].irq_res);
2001 vdev->config.isr_info[i].irq_res = NULL;
2005 if (vdev->intr_count)
2006 pci_release_msi(vdev->ndev);
2013 vxge_free_bar_resources(vxge_dev_t *vdev, int i)
2016 vxge_pci_info_t *pci_info = vdev->pdev;
2021 bus_release_resource(vdev->ndev, SYS_RES_MEMORY,
2032 vxge_mutex_init(vxge_dev_t *vdev)
2036 snprintf(vdev->mtx_drv_name, sizeof(vdev->mtx_drv_name),
2037 "%s_drv", vdev->ndev_name);
2039 mtx_init(&vdev->mtx_drv, vdev->mtx_drv_name,
2042 for (i = 0; i < vdev->no_of_vpath; i++) {
2043 snprintf(vdev->vpaths[i].mtx_tx_name,
2044 sizeof(vdev->vpaths[i].mtx_tx_name), "%s_tx_%d",
2045 vdev->ndev_name, i);
2047 mtx_init(&vdev->vpaths[i].mtx_tx,
2048 vdev->vpaths[i].mtx_tx_name, NULL, MTX_DEF);
2057 vxge_mutex_destroy(vxge_dev_t *vdev)
2061 for (i = 0; i < vdev->no_of_vpath; i++)
2062 VXGE_TX_LOCK_DESTROY(&(vdev->vpaths[i]));
2064 VXGE_DRV_LOCK_DESTROY(vdev);
2071 vxge_rth_config(vxge_dev_t *vdev)
2080 vdev->config.rth_bkt_sz = VXGE_DEFAULT_RTH_BUCKET_SIZE;
2082 for (i = 0; i < (1 << vdev->config.rth_bkt_sz); i++)
2083 mtable[i] = i % vdev->no_of_vpath;
2094 status = vxge_hal_vpath_rts_rth_itable_set(vdev->vpath_handles,
2095 vdev->no_of_vpath, mtable,
2096 ((u32) (1 << vdev->config.rth_bkt_sz)));
2099 device_printf(vdev->ndev, "rth configuration failed\n");
2102 for (i = 0; i < vdev->no_of_vpath; i++) {
2103 vpath_handle = vxge_vpath_handle_get(vdev, i);
2109 &hash_types, vdev->config.rth_bkt_sz, TRUE);
2111 device_printf(vdev->ndev,
2113 vdev->vpaths[i].vp_id);
2127 vxge_vpath_config(vxge_dev_t *vdev)
2132 vxge_hal_device_config_t *device_config = vdev->device_config;
2138 vdev->config.no_of_vpath =
2139 min(vdev->config.no_of_vpath, vdev->max_supported_vpath);
2148 if (no_of_vpath >= vdev->config.no_of_vpath)
2151 if (!bVAL1(vdev->config.hw_info.vpath_mask, i))
2224 vdev->no_of_vpath = no_of_vpath;
2226 if (vdev->no_of_vpath == 1)
2227 vdev->config.tx_steering = 0;
2229 if (vdev->config.rth_enable && (vdev->no_of_vpath > 1)) {
2234 vdev->config.rth_enable = device_config->rth_en;
2254 vxge_vpath_open(vxge_dev_t *vdev)
2266 for (i = 0; i < vdev->no_of_vpath; i++) {
2268 vpath = &(vdev->vpaths[i]);
2288 device_printf(vdev->ndev,
2300 status = vxge_hal_vpath_open(vdev->devh, &vpath_attr,
2304 device_printf(vdev->ndev,
2310 vdev->vpath_handles[i] = vpath->handle;
2318 vpath->tx_intr_coalesce = vdev->config.intr_coalesce;
2319 vpath->rx_intr_coalesce = vdev->config.intr_coalesce;
2321 func_id = vdev->config.hw_info.func_id;
2323 if (vdev->config.low_latency &&
2324 (vdev->config.bw_info[func_id].priority ==
2329 if (vdev->ifp->if_capenable & IFCAP_LRO) {
2332 device_printf(vdev->ndev,
2337 lro->ifp = vdev->ifp;
2345 vxge_tso_config(vxge_dev_t *vdev)
2350 vdev->ifp->if_capabilities |= IFCAP_TSO4;
2352 status = vxge_bw_priority_get(vdev, NULL);
2355 func_id = vdev->config.hw_info.func_id;
2356 priority = vdev->config.bw_info[func_id].priority;
2359 vdev->ifp->if_capabilities &= ~IFCAP_TSO4;
2363 if (vdev->ifp->if_capabilities & IFCAP_TSO4)
2364 vdev->ifp->if_capabilities |= IFCAP_VLAN_HWTSO;
2370 vxge_bw_priority_get(vxge_dev_t *vdev, vxge_bw_info_t *bw_info)
2378 func_id = vdev->config.hw_info.func_id;
2381 func_mode = vdev->config.hw_info.function_mode;
2386 if (vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 0)) {
2388 status = vxge_hal_vf_rx_bw_get(vdev->devh,
2393 status = vxge_hal_get_vpath_list(vdev->devh,
2397 status = vxge_hal_bw_priority_get(vdev->devh,
2407 vdev->config.bw_info[func_id].priority = priority;
2408 vdev->config.bw_info[func_id].bandwidth = bandwidth;
2419 vxge_vpath_close(vxge_dev_t *vdev)
2424 for (i = 0; i < vdev->no_of_vpath; i++) {
2426 vpath = &(vdev->vpaths[i]);
2456 vxge_vpath_reset(vxge_dev_t *vdev)
2462 for (i = 0; i < vdev->no_of_vpath; i++) {
2463 vpath_handle = vxge_vpath_handle_get(vdev, i);
2469 device_printf(vdev->ndev,
2475 vxge_vpath_get(vxge_dev_t *vdev, mbuf_t mhead)
2490 queue_len = vdev->no_of_vpath;
2549 vxge_vpath_handle_get(vxge_dev_t *vdev, int i)
2551 return (vdev->vpaths[i].is_open ? vdev->vpaths[i].handle : NULL);
2555 vxge_firmware_verify(vxge_dev_t *vdev)
2561 if (vdev->fw_upgrade) {
2562 status = vxge_firmware_upgrade(vdev);
2569 if ((vdev->config.function_mode != VXGE_DEFAULT_CONFIG_VALUE) &&
2570 (vdev->config.hw_info.function_mode !=
2571 (u64) vdev->config.function_mode)) {
2573 status = vxge_func_mode_set(vdev);
2580 status = vxge_hal_get_active_config(vdev->devh,
2585 vdev->l2_switch = active_config;
2586 if (vdev->config.l2_switch != VXGE_DEFAULT_CONFIG_VALUE) {
2587 if (vdev->config.l2_switch != active_config) {
2588 status = vxge_l2switch_mode_set(vdev);
2595 if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
2596 if (vxge_port_mode_update(vdev) == ENXIO)
2602 device_printf(vdev->ndev, "PLEASE POWER CYCLE THE SYSTEM\n");
2608 vxge_firmware_upgrade(vxge_dev_t *vdev)
2615 hw_info = &vdev->config.hw_info;
2620 device_printf(vdev->ndev, "Current firmware version : %s (%s)\n",
2623 device_printf(vdev->ndev, "Upgrading firmware to %d.%d.%d\n",
2628 status = vxge_hal_mrpcim_fw_upgrade(vdev->pdev,
2629 (pci_reg_h) vdev->pdev->reg_map[0],
2630 (u8 *) vdev->pdev->bar_info[0],
2633 device_printf(vdev->ndev, "firmware upgrade %s\n",
2640 vxge_func_mode_set(vxge_dev_t *vdev)
2645 status = vxge_hal_mrpcim_pcie_func_mode_set(vdev->devh,
2646 vdev->config.function_mode);
2647 device_printf(vdev->ndev,
2652 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2656 vxge_hal_get_active_config(vdev->devh,
2664 if (((is_multi_func(vdev->config.hw_info.function_mode)) &&
2665 is_single_func(vdev->config.function_mode)) &&
2667 vdev->config.port_mode =
2670 status = vxge_port_mode_set(vdev);
2677 vxge_port_mode_set(vxge_dev_t *vdev)
2681 status = vxge_hal_set_port_mode(vdev->devh, vdev->config.port_mode);
2682 device_printf(vdev->ndev,
2687 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2692 if (vdev->config.port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT) {
2694 status = vxge_hal_config_vpath_map(vdev->devh,
2697 device_printf(vdev->ndev, "dual port map change %s\n",
2705 vxge_port_mode_update(vxge_dev_t *vdev)
2711 if ((vdev->config.port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT) &&
2712 is_single_func(vdev->config.hw_info.function_mode)) {
2714 device_printf(vdev->ndev,
2721 status = vxge_hal_get_active_config(vdev->devh,
2729 vdev->port_mode = active_config;
2730 if (vdev->config.port_mode != VXGE_DEFAULT_CONFIG_VALUE) {
2731 if (vdev->config.port_mode != vdev->port_mode) {
2732 status = vxge_port_mode_set(vdev);
2738 vdev->port_mode = vdev->config.port_mode;
2743 status = vxge_hal_get_active_config(vdev->devh,
2751 vdev->port_failure = active_config;
2757 if (vdev->port_mode == VXGE_HAL_DP_NP_MODE_DUAL_PORT)
2758 vdev->config.port_failure =
2761 else if (vdev->port_mode == VXGE_HAL_DP_NP_MODE_ACTIVE_PASSIVE)
2762 vdev->config.port_failure =
2765 if ((vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT) &&
2766 (vdev->config.port_failure != vdev->port_failure)) {
2767 status = vxge_port_behavior_on_failure_set(vdev);
2777 vxge_port_mode_get(vxge_dev_t *vdev, vxge_port_info_t *port_info)
2784 status = vxge_hal_get_active_config(vdev->devh,
2796 status = vxge_hal_get_active_config(vdev->devh,
2811 vxge_port_behavior_on_failure_set(vxge_dev_t *vdev)
2815 status = vxge_hal_set_behavior_on_failure(vdev->devh,
2816 vdev->config.port_failure);
2818 device_printf(vdev->ndev,
2823 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2831 vxge_active_port_update(vxge_dev_t *vdev)
2837 status = vxge_hal_get_active_config(vdev->devh,
2842 vdev->active_port = active_config;
2846 vxge_l2switch_mode_set(vxge_dev_t *vdev)
2850 status = vxge_hal_set_l2switch_mode(vdev->devh,
2851 vdev->config.l2_switch);
2853 device_printf(vdev->ndev, "L2 switch %s\n",
2855 (vdev->config.l2_switch) ? "enable" : "disable" :
2859 vxge_hal_set_fw_api(vdev->devh, 0ULL,
2871 vxge_promisc_set(vxge_dev_t *vdev)
2877 if (!vdev->is_initialized)
2880 ifp = vdev->ifp;
2882 for (i = 0; i < vdev->no_of_vpath; i++) {
2883 vpath_handle = vxge_vpath_handle_get(vdev, i);
2899 vxge_change_mtu(vxge_dev_t *vdev, unsigned long new_mtu)
2906 (vdev->ifp)->if_mtu = new_mtu;
2907 device_printf(vdev->ndev, "MTU changed to %u\n", (vdev->ifp)->if_mtu);
2909 if (vdev->is_initialized) {
2910 if_down(vdev->ifp);
2911 vxge_reset(vdev);
2912 if_up(vdev->ifp);
2928 vxge_dev_t *vdev = vpath->vdev;
2929 ifnet_t ifp = vdev->ifp;
2937 vdev->rx_mbuf_sz = MCLBYTES;
2939 vdev->rx_mbuf_sz =
2946 bus_get_dma_tag(vdev->ndev),
2965 bus_get_dma_tag(vdev->ndev),
2972 vdev->rx_mbuf_sz,
2974 vdev->rx_mbuf_sz,
3024 vxge_device_hw_info_get(vxge_dev_t *vdev)
3035 status = vxge_hal_device_hw_info_get(vdev->pdev,
3036 (pci_reg_h) vdev->pdev->reg_map[0],
3037 (u8 *) vdev->pdev->bar_info[0],
3038 &vdev->config.hw_info);
3043 hw_info = &vdev->config.hw_info;
3047 device_printf(vdev->ndev, "No vpaths available in device\n");
3051 fw_option = vdev->config.fw_option;
3060 vdev->max_supported_vpath = max_supported_vpath;
3063 vdev->is_privilaged = (status == VXGE_HAL_OK) ? TRUE : FALSE;
3065 vdev->hw_fw_version = VXGE_FW_VERSION(
3075 (vdev->hw_fw_version != VXGE_DRV_FW_VERSION)) {
3079 ((vdev->hw_fw_version >= VXGE_FW_VERSION(1, 8, 1)) &&
3084 if (vdev->hw_fw_version < VXGE_BASE_FW_VERSION) {
3085 device_printf(vdev->ndev,
3090 vdev->fw_upgrade = TRUE;
3105 vxge_device_hw_info_print(vxge_dev_t *vdev)
3117 hldev = vdev->devh;
3118 ndev = vdev->ndev;
3123 hw_info = &(vdev->config.hw_info);
3125 snprintf(vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION],
3126 sizeof(vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION]),
3131 snprintf(vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO],
3132 sizeof(vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO]),
3145 snprintf(vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO],
3146 sizeof(vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO]),
3149 snprintf(vdev->config.nic_attr[VXGE_PRINT_PART_NO],
3150 sizeof(vdev->config.nic_attr[VXGE_PRINT_PART_NO]),
3153 snprintf(vdev->config.nic_attr[VXGE_PRINT_FW_VERSION],
3154 sizeof(vdev->config.nic_attr[VXGE_PRINT_FW_VERSION]),
3157 snprintf(vdev->config.nic_attr[VXGE_PRINT_FW_DATE],
3158 sizeof(vdev->config.nic_attr[VXGE_PRINT_FW_DATE]),
3164 vxge_pmd_port_type_get(vdev, pmd_port->type,
3167 strncpy(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i],
3169 sizeof(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i]));
3183 snprintf(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i],
3184 sizeof(vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0 + i]),
3194 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3195 sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3197 vdev->max_supported_vpath, "VPath(s)/function");
3201 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3202 sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3204 vdev->max_supported_vpath, "VPath(s)/function");
3208 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3209 sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3211 vdev->max_supported_vpath, "VPath(s)/function");
3215 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3216 sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3218 vdev->max_supported_vpath, "VPath(s)/function");
3222 snprintf(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3223 sizeof(vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]),
3225 vdev->max_supported_vpath, "VPath(s)/function");
3229 snprintf(vdev->config.nic_attr[VXGE_PRINT_INTR_MODE],
3230 sizeof(vdev->config.nic_attr[VXGE_PRINT_INTR_MODE]),
3231 "%s", ((vdev->config.intr_mode == VXGE_HAL_INTR_MODE_MSIX) ?
3234 snprintf(vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT],
3235 sizeof(vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT]),
3236 "%d", vdev->no_of_vpath);
3238 snprintf(vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE],
3239 sizeof(vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE]),
3240 "%u", vdev->ifp->if_mtu);
3242 snprintf(vdev->config.nic_attr[VXGE_PRINT_LRO_MODE],
3243 sizeof(vdev->config.nic_attr[VXGE_PRINT_LRO_MODE]),
3244 "%s", ((vdev->config.lro_enable) ? "Enabled" : "Disabled"));
3246 snprintf(vdev->config.nic_attr[VXGE_PRINT_RTH_MODE],
3247 sizeof(vdev->config.nic_attr[VXGE_PRINT_RTH_MODE]),
3248 "%s", ((vdev->config.rth_enable) ? "Enabled" : "Disabled"));
3250 snprintf(vdev->config.nic_attr[VXGE_PRINT_TSO_MODE],
3251 sizeof(vdev->config.nic_attr[VXGE_PRINT_TSO_MODE]),
3252 "%s", ((vdev->ifp->if_capenable & IFCAP_TSO4) ?
3255 snprintf(vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE],
3256 sizeof(vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE]),
3259 if (vdev->is_privilaged) {
3263 snprintf(vdev->config.nic_attr[VXGE_PRINT_PORT_MODE],
3264 sizeof(vdev->config.nic_attr[VXGE_PRINT_PORT_MODE]),
3265 "%s", vxge_port_mode[vdev->port_mode]);
3267 if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3268 snprintf(vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE],
3269 sizeof(vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE]),
3270 "%s", vxge_port_failure[vdev->port_failure]);
3272 vxge_active_port_update(vdev);
3273 snprintf(vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT],
3274 sizeof(vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT]),
3275 "%lld", vdev->active_port);
3279 snprintf(vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE],
3280 sizeof(vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE]),
3281 "%s", ((vdev->l2_switch) ? "Enabled" : "Disabled"));
3286 vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION]);
3289 vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO]);
3292 vdev->config.nic_attr[VXGE_PRINT_PART_NO]);
3295 vdev->config.nic_attr[VXGE_PRINT_FW_VERSION]);
3298 vdev->config.nic_attr[VXGE_PRINT_FW_DATE]);
3301 vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO]);
3303 if (vdev->is_privilaged) {
3305 vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE]);
3309 vdev->config.nic_attr[VXGE_PRINT_INTR_MODE]);
3312 vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT]);
3315 vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE]);
3318 vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0]);
3322 vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_1]);
3324 if (vdev->is_privilaged) {
3326 vdev->config.nic_attr[VXGE_PRINT_PORT_MODE]);
3328 if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3330 vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE]);
3332 device_printf(vdev->ndev, "Active Port\t: %s\n",
3333 vdev->config.nic_attr[VXGE_PRINT_ACTIVE_PORT]);
3337 if (vdev->is_privilaged && !is_single_func(hw_info->function_mode)) {
3338 device_printf(vdev->ndev, "L2 Switch\t: %s\n",
3339 vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE]);
3343 vdev->config.nic_attr[VXGE_PRINT_MTU_SIZE]);
3346 vdev->config.nic_attr[VXGE_PRINT_LRO_MODE]);
3349 vdev->config.nic_attr[VXGE_PRINT_RTH_MODE]);
3352 vdev->config.nic_attr[VXGE_PRINT_TSO_MODE]);
3356 vdev->config.nic_attr[VXGE_PRINT_DRV_VERSION],
3361 vdev->config.nic_attr[VXGE_PRINT_SERIAL_NO],
3366 vdev->config.nic_attr[VXGE_PRINT_PART_NO],
3371 vdev->config.nic_attr[VXGE_PRINT_FW_VERSION],
3376 vdev->config.nic_attr[VXGE_PRINT_FW_DATE],
3381 vdev->config.nic_attr[VXGE_PRINT_PCIE_INFO],
3384 if (vdev->is_privilaged) {
3387 vdev->config.nic_attr[VXGE_PRINT_FUNC_MODE],
3393 vdev->config.nic_attr[VXGE_PRINT_INTR_MODE],
3398 vdev->config.nic_attr[VXGE_PRINT_VPATH_COUNT],
3403 vdev->config.nic_attr[VXGE_PRINT_ADAPTER_TYPE],
3408 vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_0],
3415 vdev->config.nic_attr[VXGE_PRINT_PMD_PORTS_1],
3418 if (vdev->is_privilaged) {
3421 vdev->config.nic_attr[VXGE_PRINT_PORT_MODE],
3424 if (vdev->port_mode != VXGE_HAL_DP_NP_MODE_SINGLE_PORT)
3427 vdev->config.nic_attr[VXGE_PRINT_PORT_FAILURE],
3432 vdev->config.nic_attr[VXGE_PRINT_L2SWITCH_MODE],
3439 vdev->config.nic_attr[VXGE_PRINT_LRO_MODE],
3444 vdev->config.nic_attr[VXGE_PRINT_RTH_MODE],
3449 vdev->config.nic_attr[VXGE_PRINT_TSO_MODE],
3454 vxge_pmd_port_type_get(vxge_dev_t *vdev, u32 port_type,
3458 vdev->ifm_optics = IFM_UNKNOWN;
3462 vdev->ifm_optics = IFM_10G_SR;
3467 vdev->ifm_optics = IFM_10G_LR;
3472 vdev->ifm_optics = IFM_10G_LRM;
3477 vdev->ifm_optics = IFM_10G_TWINAX;
3482 vdev->ifm_optics = IFM_10G_CX4;
3488 vdev->ifm_optics = IFM_10G_T;
3498 vdev->ifm_optics = IFM_1000_SX;
3503 vdev->ifm_optics = IFM_1000_LX;
3508 vdev->ifm_optics = IFM_1000_CX;
3513 vdev->ifm_optics = IFM_1000_T;
3568 vxge_dev_t *vdev = (vxge_dev_t *) ifp->if_softc;
3571 if (!vdev->is_active)
3583 err = vxge_change_mtu(vdev, (unsigned long)ifr->ifr_mtu);
3588 VXGE_DRV_LOCK(vdev);
3591 if ((ifp->if_flags ^ vdev->if_flags) &
3593 vxge_promisc_set(vdev);
3595 vxge_init_locked(vdev);
3599 vxge_stop_locked(vdev);
3601 vdev->if_flags = ifp->if_flags;
3602 VXGE_DRV_UNLOCK(vdev);
3613 err = ifmedia_ioctl(ifp, ifr, &vdev->media, command);
3618 VXGE_DRV_LOCK(vdev);
3677 VXGE_DRV_UNLOCK(vdev);
3681 VXGE_DRV_LOCK(vdev);
3682 err = vxge_ioctl_stats(vdev, ifr);
3683 VXGE_DRV_UNLOCK(vdev);
3687 VXGE_DRV_LOCK(vdev);
3688 err = vxge_ioctl_regs(vdev, ifr);
3689 VXGE_DRV_UNLOCK(vdev);
3705 vxge_ioctl_regs(vxge_dev_t *vdev, struct ifreq *ifr)
3721 if (vdev->is_privilaged) {
3728 if (vdev->is_privilaged) {
3735 if (vdev->is_privilaged) {
3742 if (vdev->is_privilaged) {
3766 vpath = &(vdev->vpaths[*((u32 *) reg_info + 1)]);
3773 vpath = &(vdev->vpaths[*((u32 *) reg_info + 1)]);
3778 *((u32 *) reg_info) = vdev->no_of_vpath;
3791 status = vxge_hal_mgmt_reg_read(vdev->devh, regs_type,
3809 vxge_ioctl_stats(vxge_dev_t *vdev, struct ifreq *ifr)
3828 status = vxge_hal_aux_pci_config_read(vdev->devh,
3834 device_printf(vdev->ndev,
3842 if (!vdev->is_privilaged)
3848 status = vxge_hal_aux_stats_mrpcim_read(vdev->devh,
3854 device_printf(vdev->ndev,
3865 status = vxge_hal_aux_stats_device_read(vdev->devh,
3871 device_printf(vdev->ndev,
3884 &vdev->config.hw_info,
3888 vdev->port_mode;
3891 vdev->port_failure;
3895 device_printf(vdev->ndev,
3903 bufsize = sizeof(vxge_drv_stats_t) * vdev->no_of_vpath;
3906 for (i = 0; i < vdev->no_of_vpath; i++) {
3907 vpath = &(vdev->vpaths[i]);
3922 device_printf(vdev->ndev,
3932 if ((vdev->config.hw_info.func_id != 0) &&
3933 (vdev->hw_fw_version < VXGE_FW_VERSION(1, 8, 0)))
3936 if (vdev->config.hw_info.func_id != 0)
3937 bw_info->func_id = vdev->config.hw_info.func_id;
3939 status = vxge_bw_priority_get(vdev, bw_info);
3948 if (vdev->is_privilaged)
3949 err = vxge_bw_priority_set(vdev, ifr);
3953 if (vdev->is_privilaged) {
3954 if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
3956 vdev->config.port_mode = port_info->port_mode;
3957 err = vxge_port_mode_update(vdev);
3962 device_printf(vdev->ndev,
3970 if (vdev->is_privilaged) {
3971 if (vdev->config.hw_info.ports == VXGE_DUAL_PORT_MODE) {
3973 err = vxge_port_mode_get(vdev, port_info);
3991 vxge_bw_priority_config(vxge_dev_t *vdev)
3996 for (i = 0; i < vdev->no_of_func; i++) {
3997 err = vxge_bw_priority_update(vdev, i, TRUE);
4006 vxge_bw_priority_set(vxge_dev_t *vdev, struct ifreq *ifr)
4015 vdev->config.bw_info[func_id].priority = bw_info->priority;
4016 vdev->config.bw_info[func_id].bandwidth = bw_info->bandwidth;
4018 err = vxge_bw_priority_update(vdev, func_id, FALSE);
4024 vxge_bw_priority_update(vxge_dev_t *vdev, u32 func_id, bool binit)
4034 hldev = vdev->devh;
4036 status = vxge_hal_get_vpath_list(vdev->devh, func_id,
4046 if (vdev->config.bw_info[func_id].bandwidth !=
4050 bandwidth = vdev->config.bw_info[func_id].bandwidth;
4067 if (binit && vdev->config.low_latency) {
4069 vdev->config.bw_info[func_id].priority =
4074 if (vdev->config.bw_info[func_id].priority !=
4078 priority = vdev->config.bw_info[func_id].priority;
4086 } else if (vdev->config.low_latency) {
4092 status = vxge_hal_rx_bw_priority_set(vdev->devh,
4099 vdev->devh, vpath_list[i]);