vxge/include/vxgehal-mgmt.h

79  * @devh: HAL device handle.
97 vxge_hal_mgmt_about(vxge_hal_device_h devh,
103  * @devh: HAL device handle.
119 vxge_hal_mgmt_pci_config(vxge_hal_device_h devh, u8 *buffer, u32 *size);
173  * @devh: HAL device handle.
179 vxge_hal_mgmt_pm_capabilities_get(vxge_hal_device_h devh,
198  * @devh: HAL device handle.
204 vxge_hal_mgmt_sid_capabilities_get(vxge_hal_device_h devh,
257  * @devh: HAL device handle.
263 vxge_hal_mgmt_msi_capabilities_get(vxge_hal_device_h devh,
268  * @devh: HAL device handle.
274 vxge_hal_mgmt_msi_capabilities_set(vxge_hal_device_h devh,
307  * @devh: HAL device handle.
313 vxge_hal_mgmt_msix_capabilities_get(vxge_hal_device_h devh,
394  * @devh: HAL device handle.
400 vxge_hal_mgmt_pci_err_capabilities_get(vxge_hal_device_h devh,
449  * @devh: HAL device handle.
466 vxge_hal_mgmt_device_config(vxge_hal_device_h devh,
473  * @devh: HAL device handle.
489 vxge_hal_mgmt_pcireg_read(vxge_hal_device_h devh, unsigned int offset,
521  * @devh: HAL device handle.
538 vxge_hal_mgmt_reg_read(vxge_hal_device_h devh,
546  * @devh: HAL device handle.
563 vxge_hal_mgmt_reg_write(vxge_hal_device_h devh,
572  * @devh: HAL device handle.
583 vxge_hal_mgmt_bar0_read(vxge_hal_device_h devh,
590  * @devh: HAL device handle.
601 vxge_hal_mgmt_bar1_read(vxge_hal_device_h devh,
608  * @devh: HAL device handle.
619 vxge_hal_mgmt_bar0_write(vxge_hal_device_h devh,
625  * @devh: HAL device handle.
644 vxge_hal_mgmt_register_config(vxge_hal_device_h devh,
652  * @devh: HAL device handle.
658 u32	vxge_hal_mgmt_read_xfp_current_temp(vxge_hal_device_h devh, u32 port);
662  * @devh: HAL device handle.
671 vxge_hal_mgmt_pma_loopback(vxge_hal_device_h devh, u32 port, u32 enable);
675  * @devh: HAL device handle.
684 vxge_hal_mgmt_xgmii_loopback(vxge_hal_device_h devh, u32 port, u32 enable);