usb/controller/at91dci.c

128 #define	AT91_CSR_ACK(csr, what) do {		\
129   (csr) &= ~((AT91_UDP_CSR_FORCESTALL|		\
132   (csr) |= ((AT91_UDP_CSR_RX_DATA_BK0|		\
305 	uint32_t csr;
310 	csr = AT91_UDP_READ_4(sc, td->status_reg);
312 	DPRINTFN(5, "csr=0x%08x rem=%u\n", csr, td->remainder);
314 	temp = csr;
321 	if (!(csr & AT91_UDP_CSR_RXSETUP)) {
328 	count = (csr & AT91_UDP_CSR_RXBYTECNT) >> 16;
361 		csr |= AT91_UDP_CSR_DIR;
363 		csr &= ~AT91_UDP_CSR_DIR;
367 	AT91_CSR_ACK(csr, temp);
368 	AT91_UDP_WRITE_4(sc, td->status_reg, csr);
382 		AT91_CSR_ACK(csr, temp);
383 		AT91_UDP_WRITE_4(sc, td->status_reg, csr);
392 	uint32_t csr;
404 	csr = AT91_UDP_READ_4(sc, td->status_reg);
406 	DPRINTFN(5, "csr=0x%08x rem=%u\n", csr, td->remainder);
408 	if (csr & AT91_UDP_CSR_RXSETUP) {
424 	temp = csr;
428 	if (!(csr & (AT91_UDP_CSR_RX_DATA_BK0 |
432 			AT91_CSR_ACK(csr, temp);
433 			AT91_UDP_WRITE_4(sc, td->status_reg, csr);
438 	count = (csr & AT91_UDP_CSR_RXBYTECNT) >> 16;
490 	AT91_CSR_ACK(csr, temp);
491 	AT91_UDP_WRITE_4(sc, td->status_reg, csr);
516 	uint32_t csr;
526 	csr = AT91_UDP_READ_4(sc, td->status_reg);
528 	DPRINTFN(5, "csr=0x%08x rem=%u\n", csr, td->remainder);
530 	if (csr & AT91_UDP_CSR_RXSETUP) {
539 	temp = csr;
542 	if (csr & AT91_UDP_CSR_TXPKTRDY) {
545 			AT91_CSR_ACK(csr, temp);
546 			AT91_UDP_WRITE_4(sc, td->status_reg, csr);
579 	AT91_CSR_ACK(csr, temp);
580 	AT91_UDP_WRITE_4(sc, td->status_reg, csr);
598 	uint32_t csr;
602 	csr = AT91_UDP_READ_4(sc, td->status_reg);
604 	DPRINTFN(5, "csr=0x%08x\n", csr);
606 	if (csr & AT91_UDP_CSR_RXSETUP) {
611 	temp = csr;
616 	if (csr & AT91_UDP_CSR_TXPKTRDY) {
619 	if (!(csr & AT91_UDP_CSR_TXCOMP)) {
631 	AT91_CSR_ACK(csr, temp);
632 	AT91_UDP_WRITE_4(sc, td->status_reg, csr);
639 		AT91_CSR_ACK(csr, temp);
640 		AT91_UDP_WRITE_4(sc, td->status_reg, csr);
1340 		/* get csr value */