sound/pci/t4dwave.c

145 tr_rd(struct tr_info *tr, int regno, int size)
149 		return bus_space_read_1(tr->st, tr->sh, regno);
151 		return bus_space_read_2(tr->st, tr->sh, regno);
153 		return bus_space_read_4(tr->st, tr->sh, regno);
160 tr_wr(struct tr_info *tr, int regno, u_int32_t data, int size)
164 		bus_space_write_1(tr->st, tr->sh, regno, data);
167 		bus_space_write_2(tr->st, tr->sh, regno, data);
170 		bus_space_write_4(tr->st, tr->sh, regno, data);
181 	struct tr_info *tr = (struct tr_info *)devinfo;
184 	switch (tr->type) {
190 		if (tr->rev > 0x01)
212 	snd_mtxlock(tr->lock);
213 	if (tr->type == ALI_PCI_ID) {
217 			j = tr_rd(tr, treg, 4);
219 			chk1 = tr_rd(tr, 0xc8, 4);
220 			chk2 = tr_rd(tr, 0xc8, 4);
223 				chk2 = tr_rd(tr, 0xc8, 4);
226 	if (tr->type != ALI_PCI_ID || i > 0) {
227 		tr_wr(tr, treg, regno | trw, 4);
230 		       	j=tr_rd(tr, treg, 4);
232 	snd_mtxunlock(tr->lock);
240 	struct tr_info *tr = (struct tr_info *)devinfo;
243 	switch (tr->type) {
269 	snd_mtxlock(tr->lock);
270 	if (tr->type == ALI_PCI_ID) {
273 			j = tr_rd(tr, treg, 4);
276 			chk1 = tr_rd(tr, 0xc8, 4);
277 			chk2 = tr_rd(tr, 0xc8, 4);
280 				chk2 = tr_rd(tr, 0xc8, 4);
283 	if (tr->type != ALI_PCI_ID || i > 0) {
285 			j=tr_rd(tr, treg, 4);
286 		if (tr->type == ALI_PCI_ID && tr->rev > 0x01)
288 		tr_wr(tr, treg, (data << TR_CDC_DATA) | regno | trw, 4);
293 	snd_mtxunlock(tr->lock);
312 	struct tr_info *tr = ch->parent;
317 	return tr_rd(tr, bank? TR_REG_ADDRINTB : TR_REG_ADDRINTA, 4) & (1 << chan);
324 	struct tr_info *tr = ch->parent;
329 	tr_wr(tr, bank? TR_REG_ADDRINTB : TR_REG_ADDRINTA, 1 << chan, 4);
335 	struct tr_info *tr = ch->parent;
339 	snd_mtxlock(tr->lock);
344 	i = tr_rd(tr, reg, 4);
349 	tr_wr(tr, reg, i, 4);
350 	snd_mtxunlock(tr->lock);
358 	struct tr_info *tr = ch->parent;
361 	i = tr_rd(tr, TR_REG_CIR, 4);
364 	tr_wr(tr, TR_REG_CIR, i, 4);
370 	struct tr_info *tr = ch->parent;
375 	tr_wr(tr, bank? TR_REG_STARTB : TR_REG_STARTA, 1 << chan, 4);
381 	struct tr_info *tr = ch->parent;
386 	tr_wr(tr, bank? TR_REG_STOPB : TR_REG_STOPA, 1 << chan, 4);
392 	struct tr_info *tr = ch->parent;
406 	if (tr->type == ALI_PCI_ID)
415 	switch (tr->type) {
432 	snd_mtxlock(tr->lock);
435 		tr_wr(tr, TR_REG_CHNBASE+(i<<2), cr[i], 4);
436 	snd_mtxunlock(tr->lock);
442 	struct tr_info *tr = ch->parent;
445 	snd_mtxlock(tr->lock);
448 		cr[i]=tr_rd(tr, TR_REG_CHNBASE+(i<<2), 4);
449 	snd_mtxunlock(tr->lock);
452 	if (tr->type == ALI_PCI_ID)
464 	switch(tr->type) {
503 	struct tr_info *tr = devinfo;
507 	ch = &tr->chinfo[tr->playchns];
508 	ch->index = tr->playchns++;
510 	ch->parent = tr;
512 	if (sndbuf_alloc(ch->buffer, tr->parent_dmat, 0, tr->bufsz) != 0)
612 	struct tr_info *tr = devinfo;
616 	ch = &tr->recchinfo;
618 	ch->parent = tr;
620 	if (sndbuf_alloc(ch->buffer, tr->parent_dmat, 0, tr->bufsz) != 0)
630 	struct tr_info *tr = ch->parent;
636 	tr_wr(tr, TR_REG_SBBL, i | (i << 16), 4);
639 	tr_wr(tr, TR_REG_SBCTRL, i, 1);
648 	struct tr_info *tr = ch->parent;
652 	tr_wr(tr, TR_REG_SBDELTA, ch->delta, 2);
672 	struct tr_info *tr = ch->parent;
680 		tr_wr(tr, TR_REG_DMAR15, 0, 1);
681 		i = tr_rd(tr, TR_REG_DMAR11, 1) & 0x03;
682 		tr_wr(tr, TR_REG_DMAR11, i | 0x54, 1);
684 	   	tr_wr(tr, TR_REG_DMAR0, sndbuf_getbufaddr(ch->buffer), 4);
686 		i = tr_rd(tr, TR_REG_DMAR4, 4) & ~0x00ffffff;
687 		tr_wr(tr, TR_REG_DMAR4, i | (sndbuf_runsz(ch->buffer) - 1), 4);
689 		tr_wr(tr, TR_REG_SBCTRL, tr_rd(tr, TR_REG_SBCTRL, 1) | 1, 1);
692 		tr_wr(tr, TR_REG_SBCTRL, tr_rd(tr, TR_REG_SBCTRL, 1) & ~7, 1);
704 	struct tr_info *tr = ch->parent;
707 	return tr_rd(tr, TR_REG_DMAR0, 4) - sndbuf_getbufaddr(ch->buffer);
734 	struct tr_info *tr = (struct tr_info *)p;
739 	intsrc = tr_rd(tr, TR_REG_MISCINT, 4);
742 		while (chnum < tr->hwchns) {
744 			active = tr_rd(tr, (chnum < 32)? TR_REG_ADDRINTA : TR_REG_ADDRINTB, 4);
745 			bufhalf = tr_rd(tr, (chnum < 32)? TR_REG_CSPF_A : TR_REG_CSPF_B, 4);
750 						if (chnum < tr->playchns) {
751 							ch = &tr->chinfo[chnum];
765 			tr_wr(tr, (chnum <= 32)? TR_REG_ADDRINTA : TR_REG_ADDRINTB, active, 4);
769 		chn_intr(tr->recchinfo.channel);
770 		tr_rd(tr, TR_REG_SBR9, 1);
771 		tr_rd(tr, TR_REG_SBR10, 1);
782 tr_init(struct tr_info *tr)
784 	switch (tr->type) {
786 		tr_wr(tr, SPA_REG_GPIO, 0, 4);
787 		tr_wr(tr, SPA_REG_CODECST, SPA_RST_OFF, 4);
790 		tr_wr(tr, TDX_REG_CODECST, TDX_CDC_ON, 4);
793 		tr_wr(tr, TNX_REG_CODECST, TNX_CDC_ON, 4);
797 	tr_wr(tr, TR_REG_CIR, TR_CIR_MIDENA | TR_CIR_ADDRENA, 4);
825 	struct tr_info *tr;
836 	tr = malloc(sizeof(*tr), M_DEVBUF, M_WAITOK | M_ZERO);
837 	tr->type = pci_get_devid(dev);
838 	tr->rev = pci_get_revid(dev);
839 	tr->lock = snd_mtxcreate(device_get_nameunit(dev), "snd_t4dwave softc");
850 		switch (tr->type) {
862 	tr->regid = PCIR_BAR(0);
863 	tr->regtype = SYS_RES_IOPORT;
864 	tr->reg = bus_alloc_resource_any(dev, tr->regtype, &tr->regid,
866 	if (tr->reg) {
867 		tr->st = rman_get_bustag(tr->reg);
868 		tr->sh = rman_get_bushandle(tr->reg);
874 	if (tr_init(tr) == -1) {
878 	tr->playchns = 0;
880 	codec = AC97_CREATE(dev, tr, tr_ac97);
884 	tr->irqid = 0;
885 	tr->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &tr->irqid,
887 	if (!tr->irq || snd_setup_intr(dev, tr->irq, 0, tr_intr, tr, &tr->ih)) {
892 	if (tr->type == ALI_PCI_ID) {
929 		tr->hwchns = ALI_MAXHWCH;
930 		tr->bufsz = ALI_BUFSZ;
933 		tr->hwchns = TR_MAXHWCH;
934 		tr->bufsz = pcm_getbuffersize(dev, 4096, TR_DEFAULT_BUFSZ,
944 		/*maxsize*/tr->bufsz, /*nsegments*/1, /*maxsegz*/tr->bufsz,
946 		/*lockarg*/&Giant, &tr->parent_dmat) != 0) {
952 		 rman_get_start(tr->reg), rman_get_start(tr->irq),PCM_KLDSTRING(snd_t4dwave));
954 	if (pcm_register(dev, tr, dacn, 1))
956 	pcm_addchan(dev, PCMDIR_REC, &trrchan_class, tr);
958 		pcm_addchan(dev, PCMDIR_PLAY, &trpchan_class, tr);
965 	if (tr->reg) bus_release_resource(dev, tr->regtype, tr->regid, tr->reg);
966 	if (tr->ih) bus_teardown_intr(dev, tr->irq, tr->ih);
967 	if (tr->irq) bus_release_resource(dev, SYS_RES_IRQ, tr->irqid, tr->irq);
968 	if (tr->parent_dmat) bus_dma_tag_destroy(tr->parent_dmat);
969 	if (tr->lock) snd_mtxfree(tr->lock);
970 	free(tr, M_DEVBUF);
978 	struct tr_info *tr;
984 	tr = pcm_getdevinfo(dev);
985 	bus_release_resource(dev, tr->regtype, tr->regid, tr->reg);
986 	bus_teardown_intr(dev, tr->irq, tr->ih);
987 	bus_release_resource(dev, SYS_RES_IRQ, tr->irqid, tr->irq);
988 	bus_dma_tag_destroy(tr->parent_dmat);
989 	snd_mtxfree(tr->lock);
990 	free(tr, M_DEVBUF);
999 	struct tr_info *tr;
1001 	tr = pcm_getdevinfo(dev);
1003 	for (i = 0; i < tr->playchns; i++) {
1004 		tr->chinfo[i].was_active = tr->chinfo[i].active;
1005 		if (tr->chinfo[i].active) {
1006 			trpchan_trigger(NULL, &tr->chinfo[i], PCMTRIG_STOP);
1010 	tr->recchinfo.was_active = tr->recchinfo.active;
1011 	if (tr->recchinfo.active) {
1012 		trrchan_trigger(NULL, &tr->recchinfo, PCMTRIG_STOP);
1022 	struct tr_info *tr;
1024 	tr = pcm_getdevinfo(dev);
1026 	if (tr_init(tr) == -1) {
1036 	for (i = 0; i < tr->playchns; i++) {
1037 		if (tr->chinfo[i].was_active) {
1038 			trpchan_trigger(NULL, &tr->chinfo[i], PCMTRIG_START);
1042 	if (tr->recchinfo.was_active) {
1043 		trrchan_trigger(NULL, &tr->recchinfo, PCMTRIG_START);