Lines Matching refs:enp

46 	__in		efx_nic_t *enp,
54 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
55 enp->en_family == EFX_FAMILY_MEDFORD);
63 efx_mcdi_execute(enp, &req);
89 __in efx_nic_t *enp,
98 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
99 enp->en_family == EFX_FAMILY_MEDFORD);
107 efx_mcdi_execute(enp, &req);
196 __in efx_nic_t *enp,
204 EFSYS_ASSERT3U(enp->en_vport_id, ==, EVB_PORT_ID_NULL);
215 enp->en_nic_cfg.enc_allow_set_mac_with_installed_filters ? 1 : 0);
217 efx_mcdi_execute(enp, &req);
234 __in efx_nic_t *enp,
250 efx_mcdi_execute(enp, &req);
267 __in efx_nic_t *enp,
275 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
276 enp->en_family == EFX_FAMILY_MEDFORD);
284 efx_mcdi_execute(enp, &req);
324 __in efx_nic_t *enp,
332 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
333 enp->en_family == EFX_FAMILY_MEDFORD);
344 efx_mcdi_execute(enp, &req);
386 __in efx_nic_t *enp,
395 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
396 enp->en_family == EFX_FAMILY_MEDFORD);
404 efx_mcdi_execute(enp, &req);
443 __in efx_nic_t *enp,
459 efx_mcdi_execute(enp, &req);
490 __in efx_nic_t *enp,
506 efx_mcdi_execute(enp, &req);
542 __in efx_nic_t *enp,
568 efx_mcdi_execute(enp, &req);
604 __in efx_nic_t *enp)
618 efx_mcdi_execute_quiet(enp, &req);
637 __in efx_nic_t *enp,
656 efx_mcdi_execute_quiet(enp, &req);
684 __in efx_nic_t *enp,
700 efx_mcdi_execute_quiet(enp, &req);
717 __in efx_nic_t *enp,
735 efx_mcdi_execute(enp, &req);
752 __in efx_nic_t *enp,
768 efx_mcdi_execute_quiet(enp, &req);
785 __in efx_nic_t *enp,
792 EFX_ARRAY_SIZE(enp->en_arch.ef10.ena_piobuf_handle));
794 enp->en_arch.ef10.ena_piobuf_count = 0;
797 handlep = &enp->en_arch.ef10.ena_piobuf_handle[i];
799 if (efx_mcdi_alloc_piobuf(enp, handlep) != 0)
802 enp->en_arch.ef10.ena_pio_alloc_map[i] = 0;
803 enp->en_arch.ef10.ena_piobuf_count++;
809 for (i = 0; i < enp->en_arch.ef10.ena_piobuf_count; i++) {
810 handlep = &enp->en_arch.ef10.ena_piobuf_handle[i];
812 (void) efx_mcdi_free_piobuf(enp, *handlep);
815 enp->en_arch.ef10.ena_piobuf_count = 0;
821 __in efx_nic_t *enp)
826 for (i = 0; i < enp->en_arch.ef10.ena_piobuf_count; i++) {
827 handlep = &enp->en_arch.ef10.ena_piobuf_handle[i];
829 (void) efx_mcdi_free_piobuf(enp, *handlep);
832 enp->en_arch.ef10.ena_piobuf_count = 0;
838 __inout efx_nic_t *enp,
845 efx_nic_cfg_t *encp = &enp->en_nic_cfg;
846 efx_drv_cfg_t *edcp = &enp->en_drv_cfg;
851 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
852 enp->en_family == EFX_FAMILY_MEDFORD);
860 (enp->en_arch.ef10.ena_piobuf_count == 0)) {
866 for (buf = 0; buf < enp->en_arch.ef10.ena_piobuf_count; buf++) {
867 uint32_t *map = &enp->en_arch.ef10.ena_pio_alloc_map[buf];
884 *handlep = enp->en_arch.ef10.ena_piobuf_handle[buf];
903 __inout efx_nic_t *enp,
910 if ((bufnum >= enp->en_arch.ef10.ena_piobuf_count) ||
916 map = &enp->en_arch.ef10.ena_pio_alloc_map[bufnum];
935 __inout efx_nic_t *enp,
939 return (efx_mcdi_link_piobuf(enp, vi_index, handle));
944 __inout efx_nic_t *enp,
947 return (efx_mcdi_unlink_piobuf(enp, vi_index));
952 __in efx_nic_t *enp,
966 efx_mcdi_execute(enp, &req);
995 __in efx_nic_t *enp)
997 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1003 if ((rc = efx_mcdi_get_capabilities(enp, &flags, &flags2,
1007 if ((rc = ef10_mcdi_get_pf_count(enp, &encp->enc_hw_pf_count)) != 0)
1147 __in efx_nic_t *enp,
1150 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1154 if ((rc = efx_mcdi_privilege_mask(enp, encp->enc_pf, encp->enc_vf,
1254 __in efx_nic_t *enp,
1266 if ((rc = efx_mcdi_get_port_modes(enp, &port_modes, &current)) != 0) {
1271 if ((rc = efx_mcdi_get_port_modes(enp,
1290 enp->en_family)
1324 __in efx_nic_t *enp)
1326 const efx_nic_ops_t *enop = enp->en_enop;
1327 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1328 efx_drv_cfg_t *edcp = &(enp->en_drv_cfg);
1331 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
1332 enp->en_family == EFX_FAMILY_MEDFORD);
1335 if ((rc = efx_mcdi_read_assertion(enp)) != 0)
1339 if ((rc = efx_mcdi_exit_assertion_handler(enp)) != 0)
1343 if ((rc = efx_mcdi_drv_attach(enp, B_TRUE)) != 0)
1346 if ((rc = enop->eno_board_cfg(enp)) != 0)
1366 if ((rc = efx_mcdi_mac_stats_clear(enp)) != 0)
1371 if ((rc = efx_mcdi_get_loopback_modes(enp)) != 0)
1376 if ((rc = mcdi_mon_cfg_build(enp)) != 0) {
1383 encp->enc_features = enp->en_features;
1413 __inout efx_nic_t *enp,
1416 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1417 efx_drv_cfg_t *edcp = &(enp->en_drv_cfg);
1488 __in efx_nic_t *enp)
1496 if ((rc = efx_mcdi_read_assertion(enp)) != 0)
1498 if ((rc = efx_mcdi_exit_assertion_handler(enp)) != 0)
1510 efx_mcdi_execute(enp, &req);
1518 enp->en_reset_flags &= ~(EFX_RESET_RXQ_ERR | EFX_RESET_TXQ_ERR);
1534 __in efx_nic_t *enp)
1536 efx_drv_cfg_t *edcp = &(enp->en_drv_cfg);
1544 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
1545 enp->en_family == EFX_FAMILY_MEDFORD);
1548 if ((rc = efx_mcdi_log_ctrl(enp)) != 0)
1552 ef10_nic_alloc_piobufs(enp, edcp->edc_max_piobuf_count);
1569 edcp->edc_max_vi_count + enp->en_arch.ef10.ena_piobuf_count;
1572 if ((rc = efx_mcdi_free_vis(enp)) != 0)
1580 if ((rc = efx_mcdi_alloc_vis(enp, min_vi_count, max_vi_count,
1591 enp->en_arch.ef10.ena_vi_base = vi_base;
1592 enp->en_arch.ef10.ena_vi_count = vi_count;
1593 enp->en_arch.ef10.ena_vi_shift = vi_shift;
1595 if (vi_count < min_vi_count + enp->en_arch.ef10.ena_piobuf_count) {
1597 ef10_nic_free_piobufs(enp);
1600 enp->en_arch.ef10.ena_pio_write_vi_base =
1601 vi_count - enp->en_arch.ef10.ena_piobuf_count;
1604 enp->en_arch.ef10.ena_uc_mem_map_offset = 0;
1605 if (enp->en_arch.ef10.ena_piobuf_count > 0) {
1606 enp->en_arch.ef10.ena_uc_mem_map_size =
1608 enp->en_arch.ef10.ena_pio_write_vi_base);
1610 enp->en_arch.ef10.ena_uc_mem_map_size =
1612 enp->en_arch.ef10.ena_vi_count);
1616 enp->en_arch.ef10.ena_wc_mem_map_offset =
1617 enp->en_arch.ef10.ena_uc_mem_map_offset +
1618 enp->en_arch.ef10.ena_uc_mem_map_size;
1620 enp->en_arch.ef10.ena_wc_mem_map_size =
1622 enp->en_arch.ef10.ena_piobuf_count);
1625 if (enp->en_arch.ef10.ena_piobuf_count > 0) {
1626 for (i = 0; i < enp->en_arch.ef10.ena_piobuf_count; i++) {
1627 rc = efx_mcdi_link_piobuf(enp,
1628 enp->en_arch.ef10.ena_pio_write_vi_base + i,
1629 enp->en_arch.ef10.ena_piobuf_handle[i]);
1648 while ((rc = efx_mcdi_vadaptor_alloc(enp, EVB_PORT_ID_ASSIGNED)) != 0) {
1649 if (EFX_PCI_FUNCTION_IS_PF(&enp->en_nic_cfg) ||
1671 enp->en_vport_id = EVB_PORT_ID_ASSIGNED;
1672 enp->en_nic_cfg.enc_mcdi_max_payload_length = MCDI_CTL_SDU_LEN_MAX_V2;
1687 ef10_nic_free_piobufs(enp);
1697 __in efx_nic_t *enp,
1700 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
1701 enp->en_family == EFX_FAMILY_MEDFORD);
1707 *vi_countp = enp->en_arch.ef10.ena_pio_write_vi_base;
1714 __in efx_nic_t *enp,
1721 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
1722 enp->en_family == EFX_FAMILY_MEDFORD);
1732 *offsetp = enp->en_arch.ef10.ena_uc_mem_map_offset;
1733 *sizep = enp->en_arch.ef10.ena_uc_mem_map_size;
1738 *offsetp = enp->en_arch.ef10.ena_wc_mem_map_offset;
1739 *sizep = enp->en_arch.ef10.ena_wc_mem_map_size;
1757 __in efx_nic_t *enp)
1762 (void) efx_mcdi_vadaptor_free(enp, enp->en_vport_id);
1763 enp->en_vport_id = 0;
1766 if (enp->en_arch.ef10.ena_piobuf_count > 0) {
1767 for (i = 0; i < enp->en_arch.ef10.ena_piobuf_count; i++) {
1768 rc = efx_mcdi_unlink_piobuf(enp,
1769 enp->en_arch.ef10.ena_pio_write_vi_base + i);
1775 ef10_nic_free_piobufs(enp);
1777 (void) efx_mcdi_free_vis(enp);
1778 enp->en_arch.ef10.ena_vi_count = 0;
1783 __in efx_nic_t *enp)
1786 mcdi_mon_cfg_free(enp);
1788 (void) efx_mcdi_drv_attach(enp, B_FALSE);
1795 __in efx_nic_t *enp)
1800 _NOTE(ARGUNUSED(enp))