Lines Matching defs:ridx

1468 	int i, nsegs, ntxds, pad, rate, ridx, error;
1511 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt, rate);
1514 mcs = rt2860_rates[ridx].mcs;
1526 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) {
1528 if (ridx != RT2860_RIDX_CCK1 &&
1549 rt2860_rates[ridx].phy == IEEE80211_T_OFDM)))
1560 dur = rt2860_rates[ridx].sp_ack_dur;
1562 dur = rt2860_rates[ridx].lp_ack_dur;
1678 DPRINTFN(4, ("sending frame qid=%d wcid=%d nsegs=%d ridx=%d\n",
1679 qid, txwi->wcid, nsegs, ridx));
1743 int i, nsegs, ntxds, pad, rate, ridx, error;
1754 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
1756 if (ridx == (uint8_t)-1) {
1767 mcs = rt2860_rates[ridx].mcs;
1776 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) {
1778 if (ridx != RT2860_RIDX_CCK1 &&
1805 dur = rt2860_rates[ridx].sp_ack_dur;
1807 dur = rt2860_rates[ridx].lp_ack_dur;
1923 DPRINTFN(4, ("sending frame qid=%d wcid=%d nsegs=%d ridx=%d\n",
1924 qid, txwi->wcid, nsegs, ridx));
3356 int ridx, ant, i;
3532 for (ridx = 0; ridx < 5; ridx++) {
3535 val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2);
3537 val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1);
3540 sc->txpow20mhz[ridx] = reg;
3541 sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz);
3542 sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz);
3544 DPRINTF(("ridx %d: power 20MHz=0x%08x, 40MHz/2GHz=0x%08x, "
3545 "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx],
3546 sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx]));
3803 int i, qid, ridx, ntries, error;
3846 for (ridx = 0; ridx < 5; ridx++) {
3847 if (sc->txpow20mhz[ridx] == 0xffffffff)
3849 RAL_WRITE(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]);
4172 int8_t ridx, d;
4200 for (ridx = 0; ridx < 5; ridx++) {
4201 if (sc->txpow20mhz[ridx] == 0xffffffff)
4203 RAL_WRITE(sc, RT2860_TX_PWR_CFG(ridx),
4204 b4inc(sc->txpow20mhz[ridx], d));
4277 int ridx;
4286 ridx = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ?
4288 txwi.phy = htole16(rt2860_rates[ridx].mcs);
4289 if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM)