Lines Matching refs:PCIEIP_REG_LANE14_15_EQUALIZATION_CTRL_DNSTREAM_COMP_TX_PRESETS15_BB
3795 #define PCIEIP_REG_LANE14_15_EQUALIZATION_CTRL_DNSTREAM_COMP_TX_PRESETS15_BB (0xf<<24) // Latest Transmitter Preset Requested from Upstream Component on Lane15