Lines Matching refs:NIG_REG_INT_MASK_6_P2_TX_BTB_FIFO_ERROR_K2_E5

57919   #define NIG_REG_INT_MASK_6_P2_TX_BTB_FIFO_ERROR_K2_E5                                                      (0x1<<5) // This bit masks, when set, the Interrupt bit: NIG_REG_INT_STS_6.P2_TX_BTB_FIFO_ERROR .