Lines Matching defs:XCM_REG_INT_MASK_0_IS_USDM_OVFL_ERR
76133 #define XCM_REG_INT_MASK_0_IS_USDM_OVFL_ERR (0x1<<9) // This bit masks, when set, the Interrupt bit: XCM_REG_INT_STS_0.IS_USDM_OVFL_ERR .