Lines Matching defs:PHY_PCIE_IP_REG_AHB_LANE_CSR_2_X284_LN_MSM_RESET_TX_CLKDIV_OVR_O_K2_E5
32215 #define PHY_PCIE_IP_REG_AHB_LANE_CSR_2_X284_LN_MSM_RESET_TX_CLKDIV_OVR_O_K2_E5 (0x3<<6) // Not currently used