Lines Matching defs:PHY_PCIE_IP_REG_AHB_LANE_CSR_1_X308_BLOCK_DEC_CLR_ERR_O_K2_E5
31220 #define PHY_PCIE_IP_REG_AHB_LANE_CSR_1_X308_BLOCK_DEC_CLR_ERR_O_K2_E5 (0x1<<7) // 130b/128b: clear error flag