Lines Matching defs:PHY_NW_IP_REG_PHY0_OVR_LN2_RESERVEDREGISTER400_F378_K2_E5
13463 #define PHY_NW_IP_REG_PHY0_OVR_LN2_RESERVEDREGISTER400_F378_K2_E5 (0x1f<<0) // Reserved