Lines Matching defs:PHY_NW_IP_REG_PHY0_OVR_CMU_R_RESERVEDREGISTER95_K2_E5
12553 #define PHY_NW_IP_REG_PHY0_OVR_CMU_R_RESERVEDREGISTER95_K2_E5 0x000e1cUL //Access:RW DataWidth:0x8 // Multi Field Register.