Lines Matching defs:PCIEIP_VF_REG_PCIEEPVF_CLSIZE_BIST_E5

9385   #define PCIEIP_VF_REG_PCIEEPVF_CLSIZE_BIST_E5                                                              (0xff<<24) // The BIST register functions are not supported. All 8 bits of the BIST register are hardwired to 0x0.