Lines Matching defs:PCIEIP_REG_PCIER_TLDA1_CTLSTAT_DATA_AT_TRIG_BB

7546   #define PCIEIP_REG_PCIER_TLDA1_CTLSTAT_DATA_AT_TRIG_BB                                                     (0x1<<13) // When set after FIFO has triggered, indicates that data at the trigger has been collected (as opposed to filtered out based on indirect register settings).