Lines Matching refs:bar0
167 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
171 (void) __hal_device_register_poll(hldev, &bar0->adapter_status, 1,
182 (void) __hal_device_register_poll(hldev, &bar0->adapter_status, 1,
211 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
215 &bar0->adapter_status);
224 &bar0->pcc_enable);
242 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
269 &bar0->beacon_control);
272 val64, &bar0->beacon_control);
275 (void *) ((u8 *)bar0 + 0x2700));
310 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
332 xena_fix_mac[i++], &bar0->beacon_control);
349 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
353 &bar0->mac_cfg);
357 XGE_HAL_RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
360 (u32)(val64 >> 32), &bar0->mac_cfg);
379 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
383 &bar0->mac_cfg);
387 XGE_HAL_RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
390 (u32)(val64 >> 32), &bar0->mac_cfg);
407 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
411 &bar0->pic_control);
415 &bar0->pic_control);
429 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
433 XGE_HAL_RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
435 &bar0->mac_cfg);
445 &bar0->rts_rth_cfg) & XGE_HAL_RTS_RTH_EN)) {
453 (u32)(val64 >> 32), (char*)&bar0->mac_cfg);
474 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
495 val64, &bar0->mc_pause_thresh_q0q3);
497 val64, &bar0->mc_pause_thresh_q4q7);
502 &bar0->rmac_pause_cfg);
514 &bar0->rmac_pause_cfg);
523 &bar0->mc_pause_thresh_q0q3);
532 &bar0->mc_pause_thresh_q4q7);
610 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
615 hldev->regh0, &bar0->general_int_mask);
625 hldev->regh0, &bar0->pic_int_mask);
635 temp64, &bar0->pic_int_mask);
643 hldev->regh0, &bar0->misc_int_mask);
647 &bar0->misc_int_mask);
662 hldev->regh0, &bar0->misc_int_mask);
667 &bar0->misc_int_mask);
677 &bar0->pic_int_mask);
691 0x0, &bar0->txdma_int_mask);
693 0x0, &bar0->pfc_err_mask);
695 0x0, &bar0->tda_err_mask);
697 0x0, &bar0->pcc_err_mask);
699 0x0, &bar0->tti_err_mask);
701 0x0, &bar0->lso_err_mask);
703 0x0, &bar0->tpa_err_mask);
705 0x0, &bar0->sm_err_mask);
713 &bar0->txdma_int_mask);
716 &bar0->pfc_err_mask);
733 &bar0->rxdma_int_mask);
741 &bar0->rxdma_int_mask);
757 XGE_HAL_ALL_INTRS_DIS, &bar0->mac_int_mask);
759 XGE_HAL_ALL_INTRS_DIS, &bar0->mac_rmac_err_mask);
766 XGE_HAL_ALL_INTRS_DIS, &bar0->mac_int_mask);
768 XGE_HAL_ALL_INTRS_DIS, &bar0->mac_rmac_err_mask);
783 XGE_HAL_ALL_INTRS_DIS, &bar0->xgxs_int_mask);
789 XGE_HAL_ALL_INTRS_DIS, &bar0->xgxs_int_mask);
804 0x0ULL, &bar0->mc_int_mask);
811 XGE_HAL_ALL_INTRS_DIS, &bar0->mc_int_mask);
828 &bar0->tx_traffic_mask);
836 &bar0->tx_traffic_mask);
848 &bar0->rx_traffic_mask);
857 &bar0->rx_traffic_mask);
867 hldev->regh0, &bar0->txpic_int_mask);
870 temp64, &bar0->txpic_int_mask);
877 hldev->regh0, &bar0->txpic_int_mask);
881 temp64, &bar0->txpic_int_mask);
891 &bar0->general_int_mask);
953 xge_hal_pci_bar0_t *bar0;
956 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->isrbar0;
958 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1005 &bar0->tti_data1_mem);
1007 hldev->regh0, &bar0->tti_data1_mem);
1009 &bar0->tti_data2_mem);
1011 hldev->regh0, &bar0->tti_data2_mem);
1017 &bar0->tti_command_mem);
1019 if (!runtime && __hal_device_register_poll(hldev, &bar0->tti_command_mem,
1030 hldev->regh0, &bar0->tti_data1_mem));
1101 xge_hal_pci_bar0_t *bar0;
1115 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->isrbar0;
1117 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1162 &bar0->rti_data1_mem);
1164 hldev->regh0, &bar0->rti_data1_mem);
1166 &bar0->rti_data2_mem);
1168 hldev->regh0, &bar0->rti_data2_mem);
1175 &bar0->rti_command_mem);
1178 &bar0->rti_command_mem, 0,
1190 hldev->regh0, &bar0->rti_data1_mem));
1307 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1330 &bar0->dtx_control);
1340 &bar0->mdio_control);
1358 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1366 &bar0->mac_link_util);
1381 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1405 0xffffffffffffffffULL, &bar0->swapper_ctrl);
1411 &bar0->swapper_ctrl);
1427 0xffffffffffffffffULL, &bar0->swapper_ctrl);
1455 &bar0->swapper_ctrl);
1458 &bar0->swapper_ctrl);
1461 &bar0->swapper_ctrl);
1468 &bar0->pif_rd_swapper_fb);
1489 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1501 &bar0->rts_ctrl);
1504 val64, &bar0->rts_ctrl);
1517 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1530 &bar0->rts_ctrl);
1533 val64, &bar0->rts_ctrl);
1557 &bar0->rts_pn_cam_data);
1573 &bar0->rts_pn_cam_data);
1579 val64, &bar0->rts_pn_cam_ctrl);
1583 &bar0->rts_pn_cam_ctrl, 0,
1604 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1620 &bar0->rts_ds_mem_data);
1627 &bar0->rts_ds_mem_ctrl);
1632 &bar0->rts_ds_mem_ctrl, 0,
1650 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1651 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1652 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1653 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1654 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1658 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1659 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1660 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1661 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1663 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1667 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1669 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1671 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1673 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1675 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1679 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1680 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1681 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1682 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1684 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1688 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1690 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1692 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1694 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1696 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1700 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1702 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1704 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1706 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1708 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1712 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1714 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1716 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1718 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1720 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1724 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_0);
1725 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_1);
1726 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_2);
1727 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_3);
1729 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, val64, &bar0->rx_w_round_robin_4);
1831 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1848 &bar0->rts_ctrl);
1851 val64, &bar0->rts_ctrl);
1873 &bar0->rts_rth_map_mem_data);
1880 &bar0->rts_rth_map_mem_ctrl);
1884 &bar0->rts_rth_map_mem_ctrl, 0,
1900 &bar0->rts_rth_cfg);
1926 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
1936 &bar0->rxpic_int_reg);
1982 if (__hal_device_register_poll(hldev, &bar0->rxpic_int_reg, 1,
2019 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
2034 hldev->regh0, &bar0->spdm_bir_offset);
2048 hldev->spdm_mem_base = (char *)bar0 +
2066 hldev->regh0, &bar0->spdm_structure);
2139 hldev->regh0, &bar0->rts_ctrl);
2142 val64, &bar0->rts_ctrl);
2154 0, &bar0->rts_rth_hash_mask[i]);
2158 0, &bar0->rts_rth_hash_mask_5);
2163 val64, &bar0->rts_rth_status);
2169 &bar0->rts_rth_cfg);
2320 xge_hal_pci_bar0_t *bar0 =
2321 (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
2323 &bar0->pci_info);
2446 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
2457 &bar0->misc_int_mask);
2461 val64, &bar0->misc_int_mask);
2471 &bar0->adapter_control);
2475 &bar0->adapter_control);
2479 &bar0->adapter_control);
2483 &bar0->adapter_control);
2488 &bar0->adapter_status);
2501 &bar0->misc_int_mask);
2505 &bar0->misc_int_mask);
2519 if (__hal_device_register_poll(hldev, &bar0->adapter_status, 0,
2547 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
2558 &bar0->misc_int_mask);
2562 val64, &bar0->misc_int_mask);
2572 &bar0->adapter_control);
2576 if (__hal_device_register_poll(hldev, &bar0->adapter_status, 0,
2587 &bar0->adapter_control);
2591 &bar0->adapter_control);
2600 &bar0->misc_int_mask);
2604 &bar0->misc_int_mask);
2642 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
2647 &bar0->adapter_control);
2764 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
2799 &bar0->txreqtimeout);
2802 &bar0->read_retry_delay);
2805 &bar0->write_retry_delay);
2818 &bar0->txreqtimeout);
2825 &bar0->read_retry_delay);
2828 &bar0->write_retry_delay);
2834 &bar0->pic_control_2);
2838 &bar0->pic_control_2);
2842 XGE_HAL_SW_RESET_XGXS, &bar0->sw_reset);
2848 xge_os_pio_mem_write64(hldev->pdev, hldev->regh0, 0, &bar0->sw_reset);
2850 &bar0->sw_reset);
2855 &bar0->mac_int_mask);
2857 &bar0->mc_int_mask);
2859 &bar0->xgxs_int_mask);
2882 &bar0->misc_control);
2887 val64, &bar0->misc_control);
2891 &bar0->misc_control);
2896 val64, &bar0->misc_control);
2976 &bar0->pcc_enable);
2994 if (__hal_device_register_poll(hldev, &bar0->adapter_status, 1,
3011 &bar0->pic_control);
3014 &bar0->pic_control);
3033 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
3053 &bar0->pif_rd_swapper_fb);
3058 (u32)(XGE_HAL_SW_RESET_ALL>>32), (char *)&bar0->sw_reset);
3069 &bar0->sw_reset);
3110 &bar0->sw_reset);
3147 &bar0->sw_reset);
3171 xge_hal_pci_bar0_t *bar0;
3174 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
3178 &bar0->serr_source);
3185 &bar0->misc_int_reg);
3200 &bar0->mac_rmac_err_reg);
3203 err_reg, &bar0->mac_rmac_err_reg);
4013 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4042 &bar0->misc_control);
4056 val64, &bar0->misc_control);
4063 &bar0->misc_int_reg);
4066 val64, &bar0->misc_int_reg);
4075 &bar0->mac_rmac_err_reg);
4078 val64, &bar0->mac_rmac_err_reg);
4089 &bar0->adapter_control);
4092 &bar0->adapter_control);
4102 &bar0->adapter_status);
4106 &bar0->adapter_control);
4110 &bar0->adapter_control);
4118 &bar0->adapter_control);
4127 &bar0->adapter_status);
4131 &bar0->adapter_control);
4152 &bar0->adapter_control);
4158 &bar0->adapter_control);
4164 &bar0->adapter_control);
4175 &bar0->adapter_control);
4178 val64, &bar0->adapter_control);
4185 &bar0->adapter_control);
4189 &bar0->adapter_control);
4203 &bar0->dtx_control);
4204 (void) __hal_serial_mem_read64(hldev, &bar0->dtx_control);
4207 &bar0->dtx_control);
4208 (void) __hal_serial_mem_read64(hldev, &bar0->dtx_control);
4211 &bar0->dtx_control);
4212 (void) __hal_serial_mem_read64(hldev, &bar0->dtx_control);
4226 &bar0->adapter_status);
4277 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4283 &bar0->adapter_control);
4286 &bar0->adapter_control);
4292 if (__hal_device_register_poll(hldev, &bar0->adapter_status, 1,
4377 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4381 &bar0->adapter_status);
4458 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
4461 &bar0->xmsi_mask_reg);
4468 &bar0->xmsi_mask_reg);
4585 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4615 &bar0->tx_traffic_mask);
4632 &bar0->rx_traffic_mask);
4653 &bar0->general_int_mask);
4682 xge_hal_pci_bar0_t *bar0;
4696 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4701 &bar0->rmac_addr_data0_mem);
4704 &bar0->rmac_addr_data1_mem);
4709 &bar0->rmac_addr_cmd_mem);
4712 &bar0->rmac_addr_cmd_mem, 0,
4737 xge_hal_pci_bar0_t *bar0;
4751 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4756 &bar0->rmac_addr_data0_mem);
4759 &bar0->rmac_addr_data1_mem);
4765 &bar0->rmac_addr_cmd_mem);
4768 &bar0->rmac_addr_cmd_mem, 0,
4790 xge_hal_pci_bar0_t *bar0;
4794 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4799 &bar0->mac_cfg);
4804 &bar0->rmac_cfg_key);
4808 &bar0->mac_cfg);
4829 xge_hal_pci_bar0_t *bar0;
4833 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4838 &bar0->mac_cfg);
4843 &bar0->rmac_cfg_key);
4847 &bar0->mac_cfg);
4879 xge_hal_pci_bar0_t *bar0;
4887 bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4895 &bar0->rmac_addr_data0_mem);
4897 &bar0->rmac_addr_data1_mem);
4902 &bar0->rmac_addr_cmd_mem);
4906 &bar0->rmac_addr_cmd_mem, 0,
4916 &bar0->rmac_addr_cmd_mem);
4918 if (__hal_device_register_poll(hldev, &bar0->rmac_addr_cmd_mem, 0,
4926 &bar0->rmac_addr_data0_mem);
4964 xge_hal_pci_bar0_t *bar0 =
4965 (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
4981 &bar0->rmac_addr_data0_mem);
4985 &bar0->rmac_addr_data1_mem);
4992 &bar0->rmac_addr_cmd_mem);
4994 if (__hal_device_register_poll(hldev, &bar0->rmac_addr_cmd_mem, 0,
5186 hldev->isrbar0 = hldev->bar0 = attr->bar0;
5207 xge_assert(hldev->bar0);
5666 xge_hal_pci_bar0_t *bar0 =
5667 (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
5673 hldev->regh0, &bar0->adapter_control);
5679 &bar0->adapter_control);
5759 xge_hal_pci_bar0_t *bar0 =
5760 (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
5766 &bar0->scheduled_int_ctrl);
5779 val64, &bar0->scheduled_int_ctrl);
5891 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
5899 &bar0->rts_rth_spdm_mem_ctrl);
5903 &bar0->rts_rth_spdm_mem_ctrl, 0,
5911 hldev->regh0, &bar0->rts_rth_spdm_mem_data);
6076 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
6155 &bar0->rts_rth_jhash_cfg);
6220 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
6241 if (__hal_device_register_poll(hldev, &bar0->rxpic_int_reg, 1,
6254 &bar0->rxpic_int_reg);
6257 &bar0->rxpic_int_reg);
6422 &bar0->rxpic_int_reg, 1,
6454 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
6462 &bar0->rx_traffic_mask);
6466 &bar0->rx_traffic_mask);
6480 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
6488 &bar0->tx_traffic_mask);
6492 &bar0->tx_traffic_mask);
6511 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
6520 &bar0->rx_mat);
6523 &bar0->rx_mat);
6530 &bar0->tx_mat[0]);
6533 &bar0->tx_mat[0]);
6621 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
6626 (u32)(val64 >> 32), &bar0->xmsi_access);
6628 (u32)(val64), &bar0->xmsi_access);
6631 &bar0->xmsi_access);
6638 &bar0->xmsi_data));
6640 &bar0->xmsi_address);
6658 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
6665 &bar0->rx_mat);
6668 &bar0->rx_mat);
6675 &bar0->tx_mat[0]);
6678 &bar0->tx_mat[0]);
6913 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
6921 &bar0->rts_ctrl);
6924 val64, &bar0->rts_ctrl);
6940 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
6948 &bar0->rts_ctrl);
6951 val64, &bar0->rts_ctrl);
6954 &bar0->rts_rth_cfg);
6975 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
6980 &bar0->rts_default_q);
6987 &bar0->rts_rth_cfg);
7001 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
7006 &bar0->rts_rth_cfg);
7009 &bar0->rts_rth_cfg);
7023 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
7027 &bar0->rts_rth_cfg);
7030 &bar0->rts_rth_cfg);
7048 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
7057 &bar0->rts_rth_map_mem_data);
7064 &bar0->rts_rth_map_mem_ctrl);
7068 &bar0->rts_rth_map_mem_ctrl, 0,
7094 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *) hldev->bar0;
7114 &bar0->rts_rth_hash_mask[nreg++]);
7121 &bar0->rts_rth_hash_mask[nreg++]);
7151 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)(void *)hldev->bar0;
7167 &bar0->rts_mac_cfg);
7200 val64, &bar0->rts_mac_cfg);
7218 xge_hal_pci_bar0_t *bar0 = (xge_hal_pci_bar0_t *)hldev->bar0;
7224 &bar0->mc_rldram_test_ctrl);
7229 &bar0->mc_driver);
7234 &bar0->mc_rldram_mrs);
7239 &bar0->mc_rldram_mrs);
7244 &bar0->mc_rldram_test_add);
7248 &bar0->mc_rldram_test_add_bkg);
7252 &bar0->mc_rldram_test_ctrl);
7254 if (__hal_device_register_poll(hldev, &bar0->mc_rldram_test_ctrl, 1,
7263 &bar0->mc_rldram_test_ctrl);