ntb/ntb_hw/ntb_hw_intel.c

293 #define intel_ntb_reg_read(SIZE, offset) \
1151 		return (intel_ntb_reg_read(8, regoff));
1155 	return (intel_ntb_reg_read(2, regoff));
1703 		reg_val = intel_ntb_reg_read(4, base_reg);
1707 		reg_val = intel_ntb_reg_read(4, lmt_reg);
1711 		reg_val = intel_ntb_reg_read(8, base_reg);
1715 		reg_val = intel_ntb_reg_read(8, lmt_reg);
1728 		base_addr = intel_ntb_reg_read(4, bar->pbarxlat_off);
1731 		base_addr = intel_ntb_reg_read(8, bar->pbarxlat_off);
1826 			ntb->msix_xlat = intel_ntb_reg_read(8, xlat_reg);
1830 			ntb->msix_xlat = intel_ntb_reg_read(4, xlat_reg);
1836 	(void)intel_ntb_reg_read(8, XEON_SBAR2XLAT_OFFSET);
1837 	(void)intel_ntb_reg_read(8, XEON_SBAR4XLAT_OFFSET);
1903 	status = intel_ntb_reg_read(4, ATOM_LTSSMSTATEJMP_OFFSET);
1907 	status = intel_ntb_reg_read(4, ATOM_IBSTERRRCRVSTS0_OFFSET);
1958 	status = intel_ntb_reg_read(4, ATOM_ERRCORSTS_OFFSET);
1963 	status = intel_ntb_reg_read(4, ATOM_LTSSMERRSTS0_OFFSET);
1968 	status = intel_ntb_reg_read(4, ATOM_DESKEWSTS_OFFSET);
1972 	status = intel_ntb_reg_read(4, ATOM_IBSTERRRCRVSTS0_OFFSET);
1977 	status = intel_ntb_reg_read(4, ATOM_LTSSMSTATEJMP_OFFSET);
2002 	cntl = intel_ntb_reg_read(4, ntb->reg->ntb_ctl);
2025 	cntl = intel_ntb_reg_read(4, ntb->reg->ntb_ctl);
2049 	cntl = intel_ntb_reg_read(4, ntb->reg->ntb_ctl);
2074 	status32 = intel_ntb_reg_read(4, ntb->reg->ntb_ctl);
2078 	status32 = intel_ntb_reg_read(4, ntb->reg->lnk_sta);
2107 		ntb_cntl = intel_ntb_reg_read(4, ntb->reg->ntb_ctl);
2112 		ntb->lnk_sta = intel_ntb_reg_read(4, ntb->reg->lnk_sta);
2560 				umv = intel_ntb_reg_read(8, reg);
2567 				umv = intel_ntb_reg_read(4, reg);
2574 				umv = intel_ntb_reg_read(2, reg);
2581 				umv = intel_ntb_reg_read(1, reg);
2758 	*val = intel_ntb_reg_read(4, ntb->self_reg->spad + idx * 4);
2790 		*val = intel_ntb_reg_read(4, ntb->peer_reg->spad + idx * 4);
2873 		base = intel_ntb_reg_read(8, base_reg) & BAR_HIGH_MASK;
2880 		reg_val = intel_ntb_reg_read(8, xlat_reg) & BAR_HIGH_MASK;
2888 		reg_val = intel_ntb_reg_read(8, limit_reg) & BAR_HIGH_MASK;
2902 		base = intel_ntb_reg_read(4, base_reg) & BAR_HIGH_MASK;
2909 		reg_val = intel_ntb_reg_read(4, xlat_reg) & BAR_HIGH_MASK;
2917 		reg_val = intel_ntb_reg_read(4, limit_reg) & BAR_HIGH_MASK;