Lines Matching refs:np
272 #define INB(r) bus_read_1(np->reg_res, offsetof(struct ncr_reg, r))
273 #define INW(r) bus_read_2(np->reg_res, offsetof(struct ncr_reg, r))
274 #define INL(r) bus_read_4(np->reg_res, offsetof(struct ncr_reg, r))
276 #define OUTB(r, val) bus_write_1(np->reg_res, offsetof(struct ncr_reg, r), val)
277 #define OUTW(r, val) bus_write_2(np->reg_res, offsetof(struct ncr_reg, r), val)
278 #define OUTL(r, val) bus_write_4(np->reg_res, offsetof(struct ncr_reg, r), val)
279 #define OUTL_OFF(o, val) bus_write_4(np->reg_res, o, val)
281 #define INB_OFF(o) bus_read_1(np->reg_res, o)
282 #define INW_OFF(o) bus_read_2(np->reg_res, o)
283 #define INL_OFF(o) bus_read_4(np->reg_res, o)
287 bus_read_4(np->sram_res, off))
295 bus_write_4(np->sram_res, off, val); \
299 READSCRIPT_OFF(np->script, offsetof(struct script, r))
302 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val)
1129 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl))
1130 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl))
1239 static nccb_p ncr_alloc_nccb(ncb_p np, u_long target, u_long lun);
1240 static void ncr_complete(ncb_p np, nccb_p cp);
1242 static void ncr_exception(ncb_p np);
1243 static void ncr_free_nccb(ncb_p np, nccb_p cp);
1244 static void ncr_freeze_devq(ncb_p np, struct cam_path *path);
1245 static void ncr_selectclock(ncb_p np, u_char scntl3);
1246 static void ncr_getclock(ncb_p np, u_char multiplier);
1247 static nccb_p ncr_get_nccb(ncb_p np, u_long t,u_long l);
1251 static void ncr_init(ncb_p np, char * msg, u_long code);
1253 static void ncr_intr_locked(ncb_p np);
1254 static void ncr_int_ma(ncb_p np, u_char dstat);
1255 static void ncr_int_sir(ncb_p np);
1256 static void ncr_int_sto(ncb_p np);
1261 static void ncb_profile(ncb_p np, nccb_p cp);
1262 static void ncr_script_copy_and_bind(ncb_p np, ncrcmd *src, ncrcmd *dst,
1267 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp,
1269 static void ncr_setsync(ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer,
1271 static void ncr_setwide(ncb_p np, nccb_p cp, u_char wide, u_char ack);
1273 static int ncr_snooptest(ncb_p np);
1276 static void ncr_wakeup(ncb_p np, u_long code);
2973 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len)
2997 device_printf(np->dev, "ERROR0 IN SCRIPT at %d.\n",
3023 device_printf(np->dev,
3032 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN))
3073 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res);
3076 new = (old & ~RELOC_MASK) + np->p_script;
3079 new = (old & ~RELOC_MASK) + np->p_scripth;
3082 new = (old & ~RELOC_MASK) + vtophys(np);
3308 ncr_init_burst(ncb_p np, u_char bc)
3310 np->rv_ctest4 &= ~0x80;
3311 np->rv_dmode &= ~(0x3 << 6);
3312 np->rv_ctest5 &= ~0x4;
3315 np->rv_ctest4 |= 0x80;
3319 np->rv_dmode |= ((bc & 0x3) << 6);
3320 np->rv_ctest5 |= (bc & 0x4);
3337 ncb_p np = (struct ncb*) device_get_softc(dev);
3349 np->dev = dev;
3350 mtx_init(&np->lock, "ncr", NULL, MTX_DEF);
3351 callout_init_mtx(&np->timer, &np->lock, 0);
3358 np->reg_rid = PCIR_BAR(1);
3359 np->reg_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
3360 &np->reg_rid, RF_ACTIVE);
3361 if (!np->reg_res) {
3376 if (!pci_map_port (config_id, 0x10, &np->port))
3385 np->rv_scntl3 = INB(nc_scntl3) & 0x77;
3386 np->rv_dmode = INB(nc_dmode) & 0xce;
3387 np->rv_dcntl = INB(nc_dcntl) & 0xa9;
3388 np->rv_ctest3 = INB(nc_ctest3) & 0x01;
3389 np->rv_ctest4 = INB(nc_ctest4) & 0x88;
3390 np->rv_ctest5 = INB(nc_ctest5) & 0x24;
3391 np->rv_gpcntl = INB(nc_gpcntl);
3392 np->rv_stest2 = INB(nc_stest2) & 0x20;
3396 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
3398 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
3401 np->rv_dcntl |= NOCOM;
3415 np->maxburst = ncr_chip_table[i].maxburst;
3416 np->maxoffs = ncr_chip_table[i].maxoffs;
3417 np->clock_divn = ncr_chip_table[i].clock_divn;
3418 np->features = ncr_chip_table[i].features;
3420 np->maxburst = 4;
3421 np->maxoffs = 8;
3422 np->clock_divn = 4;
3423 np->features = FE_ERL;
3426 np->maxwide = np->features & FE_WIDE ? 1 : 0;
3427 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000;
3428 if (np->features & FE_QUAD) np->multiplier = 4;
3429 else if (np->features & FE_DBLR) np->multiplier = 2;
3430 else np->multiplier = 1;
3436 if (np->features & (FE_ULTRA|FE_ULTRA2))
3437 ncr_getclock(np, np->multiplier);
3442 read_tekram_eeprom (np, NULL) ?
3450 if (np->rv_scntl3)
3451 np->features |= FE_BIOS;
3456 i = np->clock_divn - 1;
3459 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) {
3464 np->rv_scntl3 = i+1;
3471 period = howmany(4 * div_10M[0], np->clock_khz);
3472 if (period <= 250) np->minsync = 10;
3473 else if (period <= 303) np->minsync = 11;
3474 else if (period <= 500) np->minsync = 12;
3475 else np->minsync = howmany(period, 40);
3481 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2)))
3482 np->minsync = 25;
3483 else if (np->minsync < 12 && !(np->features & FE_ULTRA2))
3484 np->minsync = 12;
3490 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
3491 np->maxsync = period > 2540 ? 254 : period / 10;
3499 if (!(np->rv_gpcntl & 0x01))
3500 np->features |= FE_LED0;
3503 np->features |= FE_DIFF;
3512 if (!(np->features & FE_BIOS)) {
3516 np->rv_dmode = 0;
3517 np->rv_dcntl = NOCOM;
3518 np->rv_ctest3 = 0;
3519 np->rv_ctest4 = MPEE;
3520 np->rv_ctest5 = 0;
3521 np->rv_stest2 = 0;
3523 if (np->features & FE_ERL)
3524 np->rv_dmode |= ERL; /* Enable Read Line */
3525 if (np->features & FE_BOF)
3526 np->rv_dmode |= BOF; /* Burst Opcode Fetch */
3527 if (np->features & FE_ERMP)
3528 np->rv_dmode |= ERMP; /* Enable Read Multiple */
3529 if (np->features & FE_CLSE)
3530 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */
3531 if (np->features & FE_WRIE)
3532 np->rv_ctest3 |= WRIE; /* Write and Invalidate */
3533 if (np->features & FE_PFEN)
3534 np->rv_dcntl |= PFEN; /* Prefetch Enable */
3535 if (np->features & FE_DFS)
3536 np->rv_ctest5 |= DFS; /* Dma Fifo Size */
3537 if (np->features & FE_DIFF)
3538 np->rv_stest2 |= 0x20; /* Differential mode */
3539 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */
3541 np->maxburst =
3542 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5);
3548 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) {
3549 np->sram_rid = PCIR_BAR(2);
3550 np->sram_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
3551 &np->sram_rid,
3558 if (np->sram_res != NULL) {
3559 np->script = NULL;
3560 np->p_script = rman_get_start(np->sram_res);
3562 np->script = (struct script*) contigmalloc
3566 np->script = (struct script *)
3571 np->scripth = (struct scripth*) contigmalloc
3576 np->scripth = (struct scripth *)
3613 if (usrsync > np->maxsync)
3614 usrsync = np->maxsync;
3615 if (usrsync < np->minsync)
3616 usrsync = np->minsync;
3620 if (usrwide > np->maxwide) usrwide=np->maxwide;
3623 tcb_p tp = &np->target[i];
3626 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0;
3640 np->minsync, np->maxsync, np->maxoffs,
3641 burst_length(np->maxburst),
3642 (np->rv_ctest5 & DFS) ? "large" : "normal");
3649 np->rv_stest2 & 0x20 ? "differential" : "single-ended",
3650 np->rv_dcntl & IRQM ? "totem pole" : "open drain",
3651 np->sram_res ? ", using on-chip SRAM" : "");
3658 if (np->script)
3659 np->p_script = vtophys(np->script);
3660 np->p_scripth = vtophys(np->scripth);
3662 ncr_script_copy_and_bind (np, (ncrcmd *) &script0,
3663 (ncrcmd *) np->script, sizeof(struct script));
3665 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0,
3666 (ncrcmd *) np->scripth, sizeof(struct scripth));
3672 if (np->features & FE_LED0) {
3682 np->jump_tcb.l_cmd = SCR_JUMP;
3683 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
3689 np->myaddr = INB(nc_scid) & 0x07;
3690 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR;
3719 if (ncr_snooptest (np)) {
3729 np->irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
3731 if (np->irq_res == NULL) {
3735 bus_setup_intr(dev, np->irq_res, INTR_TYPE_CAM | INTR_ENTROPY |
3736 INTR_MPSAFE, NULL, ncr_intr, np, &np->irq_handle);
3752 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np,
3753 device_get_unit(dev), &np->lock, 1, MAX_TAGS, devq);
3754 if (np->sim == NULL) {
3759 mtx_lock(&np->lock);
3760 if (xpt_bus_register(np->sim, dev, 0) != CAM_SUCCESS) {
3761 cam_sim_free(np->sim, /*free_devq*/ TRUE);
3762 mtx_unlock(&np->lock);
3766 if (xpt_create_path(&np->path, /*periph*/NULL,
3767 cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
3769 xpt_bus_deregister(cam_sim_path(np->sim));
3770 cam_sim_free(np->sim, /*free_devq*/TRUE);
3771 mtx_unlock(&np->lock);
3778 ncr_timeout (np);
3779 np->lasttime=0;
3780 mtx_unlock(&np->lock);
3798 ncb_p np = vnp;
3800 mtx_lock(&np->lock);
3801 ncr_intr_locked(np);
3802 mtx_unlock(&np->lock);
3806 ncr_intr_locked(ncb_p np)
3816 ncr_exception (np);
3819 np->ticks = 100;
3838 ncb_p np;
3840 np = (ncb_p) cam_sim_softc(sim);
3841 mtx_assert(&np->lock, MA_OWNED);
3859 tp = &np->target[ccb->ccb_h.target_id];
3888 cp = ncr_get_nccb (np, ccb->ccb_h.target_id,
4031 ncr_free_nccb(np, cp);
4036 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in);
4039 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out);
4043 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data);
4064 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select);
4134 qidx = np->squeueput + 1;
4137 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle);
4138 np->squeue [np->squeueput] = CCB_PHYS (cp, phys);
4139 np->squeueput = qidx;
4142 device_printf(np->dev, "queuepos=%d tryoffset=%d.\n",
4143 np->squeueput,
4145 (NCB_SCRIPTH_PHYS (np, tryloop))));
4176 tp = &np->target[ccb->ccb_h.target_id];
4213 if (spi->bus_width > np->maxwide)
4214 spi->bus_width = np->maxwide;
4221 && (spi->sync_period < np->minsync))
4222 spi->sync_period = np->minsync;
4227 if (spi->sync_offset > np->maxoffs)
4228 spi->sync_offset = np->maxoffs;
4258 tcb_p tp = &np->target[ccb->ccb_h.target_id];
4336 if ((np->features & FE_WIDE) != 0)
4341 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
4343 cpi->initiator_id = np->myaddr;
4376 ncr_complete (ncb_p np, nccb_p cp)
4397 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle);
4402 ncb_profile (np, cp);
4410 tp = &np->target[ccb->ccb_h.target_id];
4528 ncr_free_nccb (np, cp);
4546 ncr_wakeup (ncb_p np, u_long code)
4557 nccb_p cp = np->link_nccb;
4576 ncr_complete (np, cp);
4584 ncr_freeze_devq (ncb_p np, struct cam_path *path)
4596 cp = np->link_nccb;
4605 == NCB_SCRIPT_PHYS (np, select))
4612 idx = np->squeueput - i;
4616 if (np->squeue[idx]
4618 np->squeue[idx] =
4619 NCB_SCRIPT_PHYS (np, skip);
4626 ncr_complete (np, cp);
4642 bidx = np->squeueput;
4643 i = np->squeueput - firstskip;
4652 if (np->squeue[i] == NCB_SCRIPT_PHYS (np, skip)) {
4655 np->squeue[bidx] = np->squeue[i];
4656 if (np->squeue[bidx]
4657 == NCB_SCRIPT_PHYS(np, idle))
4662 np->squeueput = bidx;
4676 ncr_init(ncb_p np, char * msg, u_long code)
4693 device_printf(np->dev, "restart (%s).\n", msg);
4700 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle);
4706 np->squeueput = 0;
4707 WRITESCRIPT(startpos[0], NCB_SCRIPTH_PHYS (np, tryloop));
4714 ncr_wakeup (np, code);
4723 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */
4724 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */
4725 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */
4727 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */
4728 OUTB (nc_dcntl , np->rv_dcntl);
4729 OUTB (nc_ctest3, np->rv_ctest3);
4730 OUTB (nc_ctest5, np->rv_ctest5);
4731 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */
4732 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */
4738 np->rv_scntl3, np->rv_dmode, np->rv_dcntl);
4740 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
4747 if (np->features & FE_LED0) {
4755 tcb_p tp = &np->target[i];
4758 tp->tinfo.wval = np->rv_scntl3;
4776 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
4782 xpt_async(AC_BUS_RESET, np->path, NULL);
4802 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p)
4804 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */
4805 int div = np->clock_divn; /* Number of divisors supported */
4870 ncr_setsync(ncb_p np, nccb_p cp, u_char scntl3, u_char sxfer, u_char period)
4887 tp = &np->target[target];
4890 scntl3 = np->rv_scntl3;
4892 | (np->rv_scntl3 & 0x07);
4902 (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz;
4946 np->sync_st = sxfer;
4948 np->wide_st = scntl3;
4953 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
4971 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack)
4988 tp = &np->target[target];
5025 np->sync_st = sxfer;
5027 np->wide_st = scntl3;
5032 for (cp = np->link_nccb; cp; cp = cp->link_nccb) {
5057 ncb_p np = arg;
5059 ticks_t step = np->ticks;
5064 mtx_assert(&np->lock, MA_OWNED);
5065 if (np->lasttime != thistime) {
5066 np->lasttime = thistime;
5079 t = thistime - np->heartbeat;
5081 if (t<2) np->latetime=0; else np->latetime++;
5083 if (np->latetime>2) {
5100 for (cp=np->link_nccb; cp; cp=cp->link_nccb) {
5114 NCB_SCRIPT_PHYS (np, select)) {
5115 device_printf(np->dev,
5118 = NCB_SCRIPT_PHYS (np, skip);
5134 ncr_complete (np, cp);
5138 callout_reset(&np->timer, step ? step : 1, ncr_timeout, np);
5147 ncr_exception (np);
5182 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat)
5193 if (np->p_script < dsp &&
5194 dsp <= np->p_script + sizeof(struct script)) {
5195 script_ofs = dsp - np->p_script;
5197 script_base = (u_char *) np->script;
5200 else if (np->p_scripth < dsp &&
5201 dsp <= np->p_scripth + sizeof(struct scripth)) {
5202 script_ofs = dsp - np->p_scripth;
5204 script_base = (u_char *) np->scripth;
5213 device_printf(np->dev,
5222 device_printf(np->dev, "script cmd = %08x\n",
5226 device_printf(np->dev, "regdump:");
5241 static void ncr_exception (ncb_p np)
5252 np->profile.num_fly++;
5253 ncr_wakeup (np, 0);
5266 np->profile.num_int++;
5288 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET);
5303 ncr_int_sto (np);
5315 ncr_int_ma (np, dstat);
5332 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data));
5345 ncr_int_sir (np);
5354 ncr_log_hard_error(np, sist, dstat);
5361 if (time_second - np->regtime > 10) {
5363 np->regtime = time_second;
5364 for (i=0; i<sizeof(np->regdump); i++)
5365 ((volatile char*)&np->regdump)[i] = INB_OFF(i);
5366 np->regdump.nc_dstat = dstat;
5367 np->regdump.nc_sist = sist;
5380 device_printf(np->dev, "have to clear fifos.\n");
5382 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5392 device_printf(np->dev, "handshake timeout\n");
5397 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5410 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup));
5431 OUTB (nc_dcntl, np->rv_dcntl | STD);
5435 device_printf(np->dev, "INFO: LDSC while IID.\n");
5438 device_printf(np->dev, "target %d doesn't release the bus.\n",
5455 OUTB (nc_dcntl, np->rv_dcntl | STD);
5469 OUTB (nc_ctest3, np->rv_ctest3 | CLF);
5483 device_printf(np->dev, "reg[%d0]: ", i / 16);
5491 val = bus_read_1(np->reg_res, i);
5496 callout_stop(&np->timer);
5498 device_printf(np->dev, "halted!\n");
5518 ncr_init (np, "fatal error", HS_FAIL);
5537 static void ncr_int_sto (ncb_p np)
5548 cp = np->link_nccb;
5554 ncr_complete (np, cp);
5562 diff = scratcha - NCB_SCRIPTH_PHYS (np, tryloop);
5568 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start));
5571 ncr_init (np, "selection timeout", HS_FAIL);
5588 static void ncr_int_ma (ncb_p np, u_char dstat)
5613 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0;
5634 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */
5640 cp = np->link_nccb;
5645 device_printf(np->dev,
5647 (void *)np->header.cp);
5650 if (cp != np->header.cp) {
5651 device_printf(np->dev,
5653 "(%p != %p) np->nccb = %p\n",
5654 (void *)cp, (void *)np->header.cp,
5655 (void *)np->link_nccb);
5672 } else if (dsp > np->p_script &&
5673 dsp <= np->p_script + sizeof(struct script)) {
5674 vdsp_base = np->script;
5675 vdsp_off = dsp - np->p_script - 8;
5678 vdsp_base = np->scripth;
5679 vdsp_off = dsp - np->p_scripth - 8;
5693 cp, np->header.cp,
5739 OUTB (nc_dcntl, np->rv_dcntl | STD);
5773 np->profile.num_break++;
5776 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
5778 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn));
5807 static void ncr_int_sir (ncb_p np)
5815 tcb_p tp = &np->target[target];
5829 cp = np->link_nccb;
5836 assert (cp == np->header.cp);
5837 if (cp != np->header.cp)
5858 device_printf(np->dev, "int#%d", num);
5862 tp = &np->target[i];
5878 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, getcc));
5907 np->target[cp->ccb->ccb_h.target_id].hold_cp = cp;
6009 ncr_setsync (np, cp, 0, 0xe0, 0);
6013 ncr_setwide (np, cp, 0, 0);
6017 np->msgin [0] = MSG_NOOP;
6018 np->msgout[0] = MSG_NOOP;
6020 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch));
6031 (void) ncr_show_msg (np->msgin);
6040 per = np->msgin[3];
6041 ofs = np->msgin[4];
6047 if (per < np->minsync)
6048 {chg = 1; per = np->minsync;}
6061 ncr_getsync(np, per, &fak, &scntl3);
6091 ncr_setsync (np, cp, 0, 0xe0, 0);
6092 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6097 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs, per);
6098 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6103 ncr_setwide (np, cp, 0, 0);
6113 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs, per);
6115 np->msgout[0] = MSG_EXTENDED;
6116 np->msgout[1] = 3;
6117 np->msgout[2] = MSG_EXT_SDTR;
6118 np->msgout[3] = per;
6119 np->msgout[4] = ofs;
6126 (void) ncr_show_msg (np->msgout);
6131 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6134 np->msgin [0] = MSG_NOOP;
6145 (void) ncr_show_msg (np->msgin);
6154 wide = np->msgin[3];
6180 ncr_setwide (np, cp, 0, 1);
6181 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad));
6186 ncr_setwide (np, cp, wide, 1);
6187 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack));
6192 ncr_setsync (np, cp, 0, 0xe0, 0);
6202 ncr_setwide (np, cp, wide, 1);
6204 np->msgout[0] = MSG_EXTENDED;
6205 np->msgout[1] = 2;
6206 np->msgout[2] = MSG_EXT_WDTR;
6207 np->msgout[3] = wide;
6209 np->msgin [0] = MSG_NOOP;
6216 (void) ncr_show_msg (np->msgout);
6238 (unsigned)np->lastmsg, np->msgout[0]);
6251 (void) ncr_show_msg (np->msgin);
6288 (unsigned) np->header.savep,
6289 (unsigned) np->header.goalp);
6308 ncr_freeze_devq(np, cp->ccb->ccb_h.path);
6309 ncr_complete(np, cp);
6324 cp = np->link_nccb;
6335 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect));
6343 device_printf(np->dev, "queue empty.\n");
6349 OUTB (nc_dcntl, np->rv_dcntl | STD);
6362 (ncb_p np, u_long target, u_long lun)
6371 lp = np->target[target].lp[lun];
6389 cp = ncr_alloc_nccb(np, target, lun);
6393 device_printf(np->dev, "Bogus free cp found\n");
6410 static void ncr_free_nccb (ncb_p np, nccb_p cp)
6432 ncr_alloc_nccb (ncb_p np, u_long target, u_long lun)
6438 assert (np != NULL);
6443 tp=&np->target[target];
6451 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr;
6454 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6456 tp->getscr[2] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_sxfer);
6458 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1);
6460 tp->getscr[5] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_scntl3);
6470 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun);
6473 tp->jump_lcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort);
6474 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb);
6496 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag);
6499 lp->jump_nccb.l_paddr = NCB_SCRIPTH_PHYS (np, aborttag);
6536 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp);
6541 cp->link_nccb = np->link_nccb;
6542 np->link_nccb = cp;
6677 static int ncr_regtest (struct ncb* np)
6701 static int ncr_snooptest (struct ncb* np)
6706 err |= ncr_regtest (np);
6712 pc = NCB_SCRIPTH_PHYS (np, snooptest);
6756 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) {
6759 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc,
6760 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8);
6805 static void ncb_profile (ncb_p np, nccb_p cp)
6834 diff = (np->disc_phys - np->disc_ref) & 0xff;
6835 np->disc_ref += diff;
6837 np->profile.num_trans += 1;
6839 np->profile.num_bytes += cp->ccb->csio.dxfer_len;
6840 np->profile.num_disc += diff;
6841 np->profile.ms_setup += co;
6842 np->profile.ms_data += work;
6843 np->profile.ms_disc += disc;
6844 np->profile.ms_post += post;
6874 static void ncr_selectclock(ncb_p np, u_char scntl3)
6876 if (np->multiplier < 2) {
6882 device_printf(np->dev, "enabling clock multiplier\n");
6885 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */
6890 device_printf(np->dev,
6904 ncrgetfreq (ncb_p np, int gen)
6949 static void ncr_getclock (ncb_p np, u_char multiplier)
6956 np->multiplier = 1;
6959 np->multiplier = multiplier;
6960 np->clock_khz = 40000 * multiplier;
6965 (void) ncrgetfreq (np, 11);
6966 f1 = ncrgetfreq (np, 11);
6967 f2 = ncrgetfreq (np, 11);
6979 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */
7018 tekram_write_bit (ncb_p np, int bit)
7032 tekram_read_bit (ncb_p np)
7042 read_tekram_eeprom_reg (ncb_p np, int reg)
7050 tekram_write_bit (np, 1);
7053 tekram_write_bit (np, cmd >> bit);
7059 result |= tekram_read_bit (np);
7067 read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer)
7081 val = read_tekram_eeprom_reg (np, i);