Lines Matching refs:cm
96 struct mpr_command *cm);
99 static void mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm);
102 static void mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm);
116 * Added this union to smoothly convert le64toh cm->cm_desc.Words.
625 struct mpr_command *cm;
683 cm = &sc->commands[i];
684 bus_dmamap_destroy(sc->buffer_dmat, cm->cm_dmamap);
987 mpr_enqueue_request(struct mpr_softc *sc, struct mpr_command *cm)
992 mpr_dprint(sc, MPR_TRACE, "SMID %u cm %p ccb %p\n",
993 cm->cm_desc.Default.SMID, cm, cm->cm_ccb);
1003 rd.u.low = cm->cm_desc.Words.Low;
1007 rd.u.low = cm->cm_desc.Words.Low;
1008 rd.u.high = cm->cm_desc.Words.High;
1198 struct mpr_command *cm;
1352 cm = &sc->commands[i];
1353 cm->cm_req = sc->req_frames +
1355 cm->cm_req_busaddr = sc->req_busaddr +
1357 cm->cm_sense = &sc->sense_frames[i];
1358 cm->cm_sense_busaddr = sc->sense_busaddr + i * MPR_SENSE_LEN;
1359 cm->cm_desc.Default.SMID = i;
1360 cm->cm_sc = sc;
1361 TAILQ_INIT(&cm->cm_chain_list);
1362 TAILQ_INIT(&cm->cm_prp_page_list);
1363 callout_init_mtx(&cm->cm_callout, &sc->mpr_mtx, 0);
1366 if (bus_dmamap_create(sc->buffer_dmat, 0, &cm->cm_dmamap)
1369 mpr_free_high_priority_command(sc, cm);
1371 mpr_free_command(sc, cm);
1881 mpr_complete_command(struct mpr_softc *sc, struct mpr_command *cm)
1885 if (cm == NULL) {
1890 if (cm->cm_flags & MPR_CM_FLAGS_POLLED)
1891 cm->cm_flags |= MPR_CM_FLAGS_COMPLETE;
1893 if (cm->cm_complete != NULL) {
1895 "%s cm %p calling cm_complete %p data %p reply %p\n",
1896 __func__, cm, cm->cm_complete, cm->cm_complete_data,
1897 cm->cm_reply);
1898 cm->cm_complete(sc, cm);
1901 if (cm->cm_flags & MPR_CM_FLAGS_WAKEUP) {
1902 mpr_dprint(sc, MPR_TRACE, "waking up %p\n", cm);
1903 wakeup(cm);
2019 struct mpr_command *cm = NULL;
2033 cm = NULL;
2042 * and cm completion handlers which decide to do a diag
2055 cm = &sc->commands[le16toh(desc->SCSIIOSuccess.SMID)];
2056 cm->cm_reply = NULL;
2123 cm = &sc->commands[
2125 cm->cm_reply = reply;
2126 cm->cm_reply_data =
2139 cm = NULL;
2143 if (cm != NULL) {
2145 if (cm->cm_reply)
2146 mpr_display_reply_info(sc,cm->cm_reply);
2147 mpr_complete_command(sc, cm);
2193 mpr_reregister_events_complete(struct mpr_softc *sc, struct mpr_command *cm)
2197 if (cm->cm_reply)
2199 (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply);
2201 mpr_free_command(sc, cm);
2241 struct mpr_command *cm = NULL;
2256 if ((cm = mpr_alloc_command(sc)) == NULL)
2258 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2271 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2272 cm->cm_data = NULL;
2274 error = mpr_request_polled(sc, &cm);
2275 if (cm != NULL)
2276 reply = (MPI2_EVENT_NOTIFICATION_REPLY *)cm->cm_reply;
2286 if (cm != NULL)
2287 mpr_free_command(sc, cm);
2295 struct mpr_command *cm;
2310 if ((cm = mpr_alloc_command(sc)) == NULL)
2312 evtreq = (MPI2_EVENT_NOTIFICATION_REQUEST *)cm->cm_req;
2325 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2326 cm->cm_data = NULL;
2327 cm->cm_complete = mpr_reregister_events_complete;
2329 error = mpr_map_command(sc, cm);
2394 mpr_build_nvme_prp(struct mpr_softc *sc, struct mpr_command *cm,
2440 TAILQ_INSERT_TAIL(&cm->cm_prp_page_list, prp_page_info, prp_page_link);
2590 mpr_check_pcie_native_sgl(struct mpr_softc *sc, struct mpr_command *cm,
2616 if ((cm->cm_targ->MDTS > 0) && (buff_len > cm->cm_targ->MDTS))
2687 main_chain_element = (pMpi25IeeeSgeChain64_t)cm->cm_sge;
2712 TAILQ_INSERT_TAIL(&cm->cm_prp_page_list, prp_page_info, prp_page_link);
2754 ptr_first_sgl = (uint32_t *)cm->cm_sge;
2866 mpr_add_chain(struct mpr_command *cm, int segsleft)
2868 struct mpr_softc *sc = cm->cm_sc;
2880 if (cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE) {
2887 if (cm->cm_sglsize < sgc_size)
2890 chain = mpr_alloc_chain(cm->cm_sc);
2898 TAILQ_INSERT_TAIL(&cm->cm_chain_list, chain, chain_link);
2906 if (cm->cm_sglsize < (sgc_size * segsleft)) {
2917 current_segs = (cm->cm_sglsize / sgc_size) - 1;
2924 ieee_sgc = &((MPI25_SGE_IO_UNION *)cm->cm_sge)->IeeeChain;
2933 cm->cm_sge = &((MPI25_SGE_IO_UNION *)chain->chain)->IeeeSimple;
2934 req = (MPI2_REQUEST_HEADER *)cm->cm_req;
2937 cm->cm_sglsize = sc->chain_frame_size;
2948 mpr_push_sge(struct mpr_command *cm, MPI2_SGE_SIMPLE64 *sge, size_t len,
2959 if (cm->cm_sglsize < (segsleft * sizeof(MPI2_SGE_SIMPLE64))) {
2960 mpr_dprint(cm->cm_sc, MPR_ERROR,
2982 * DMA buffer (same cm command).
2987 if (cm->cm_out_len) {
2988 sge->FlagsLength = cm->cm_out_len |
2994 cm->cm_sglsize -= len;
3000 bcopy(sge, cm->cm_sge, len);
3001 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
3010 if (cm->cm_flags & MPR_CM_FLAGS_DATAIN) {
3022 cm->cm_sglsize -= len;
3028 bcopy(sge, cm->cm_sge, len);
3029 cm->cm_sge = (MPI2_SGE_IO_UNION *)((uintptr_t)cm->cm_sge + len);
3039 mpr_push_ieee_sge(struct mpr_command *cm, void *sgep, int segsleft)
3056 if (cm->cm_sglsize < ieee_sge_size)
3059 if ((segsleft >= 2) && (cm->cm_sglsize < (ieee_sge_size * 2))) {
3060 if ((error = mpr_add_chain(cm, segsleft)) != 0)
3073 * DMA buffer (same cm command).
3078 if (cm->cm_out_len) {
3079 sge->Length = cm->cm_out_len;
3082 cm->cm_sglsize -= ieee_sge_size;
3088 bcopy(sgep, cm->cm_sge, ieee_sge_size);
3089 cm->cm_sge =
3090 (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge +
3101 cm->cm_sglsize -= ieee_sge_size;
3107 bcopy(sgep, cm->cm_sge, ieee_sge_size);
3108 cm->cm_sge = (MPI25_SGE_IO_UNION *)((uintptr_t)cm->cm_sge +
3117 mpr_add_dmaseg(struct mpr_command *cm, vm_paddr_t pa, size_t len, u_int flags,
3123 if (!(cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE)) {
3129 return (mpr_push_ieee_sge(cm, &ieee_sge, segsleft));
3141 return (mpr_push_sge(cm, &sge, sizeof sge, segsleft));
3149 struct mpr_command *cm;
3152 cm = (struct mpr_command *)arg;
3153 sc = cm->cm_sc;
3159 if ((cm->cm_max_segs != 0) && (nsegs > cm->cm_max_segs)) {
3162 cm->cm_max_segs);
3170 if (cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) {
3192 } else if (cm->cm_flags & MPR_CM_FLAGS_DATAOUT) {
3199 if (cm->cm_targ && cm->cm_targ->is_nvme &&
3200 mpr_check_pcie_native_sgl(sc, cm, segs, nsegs) == 0) {
3206 if ((cm->cm_flags & MPR_CM_FLAGS_SMP_PASS) && (i != 0)) {
3209 error = mpr_add_dmaseg(cm, segs[i].ds_addr, segs[i].ds_len,
3216 cm->cm_flags |= MPR_CM_FLAGS_CHAIN_FAILED;
3217 mpr_complete_command(sc, cm);
3223 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap, dir);
3224 mpr_enqueue_request(sc, cm);
3244 mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm)
3248 if (cm->cm_flags & MPR_CM_FLAGS_USE_UIO) {
3249 error = bus_dmamap_load_uio(sc->buffer_dmat, cm->cm_dmamap,
3250 &cm->cm_uio, mpr_data_cb2, cm, 0);
3251 } else if (cm->cm_flags & MPR_CM_FLAGS_USE_CCB) {
3252 error = bus_dmamap_load_ccb(sc->buffer_dmat, cm->cm_dmamap,
3253 cm->cm_data, mpr_data_cb, cm, 0);
3254 } else if ((cm->cm_data != NULL) && (cm->cm_length != 0)) {
3255 error = bus_dmamap_load(sc->buffer_dmat, cm->cm_dmamap,
3256 cm->cm_data, cm->cm_length, mpr_data_cb, cm, 0);
3259 if (cm->cm_sge != NULL)
3260 mpr_add_dmaseg(cm, 0, 0, 0, 1);
3261 mpr_enqueue_request(sc, cm);
3278 struct mpr_command *cm = *cmp;
3283 cm->cm_complete = NULL;
3284 cm->cm_flags |= (MPR_CM_FLAGS_WAKEUP + MPR_CM_FLAGS_POLLED);
3285 error = mpr_map_command(sc, cm);
3300 error = msleep(cm, &sc->mpr_mtx, 0, "mprwait", timeout*hz);
3310 while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) {
3354 struct mpr_command *cm = *cmp;
3358 cm->cm_flags |= MPR_CM_FLAGS_POLLED;
3359 cm->cm_complete = NULL;
3360 mpr_map_command(sc, cm);
3363 while ((cm->cm_flags & MPR_CM_FLAGS_COMPLETE) == 0) {
3409 struct mpr_command *cm;
3416 cm = mpr_alloc_command(sc);
3417 if (cm == NULL) {
3421 req = (MPI2_CONFIG_REQUEST *)cm->cm_req;
3447 cm->cm_data = params->buffer;
3448 cm->cm_length = params->length;
3449 if (cm->cm_data != NULL) {
3450 cm->cm_sge = &req->PageBufferSGE;
3451 cm->cm_sglsize = sizeof(MPI2_SGE_IO_UNION);
3452 cm->cm_flags = MPR_CM_FLAGS_SGE_SIMPLE | MPR_CM_FLAGS_DATAIN;
3454 cm->cm_sge = NULL;
3455 cm->cm_desc.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
3457 cm->cm_complete_data = params;
3459 cm->cm_complete = mpr_config_complete;
3460 return (mpr_map_command(sc, cm));
3462 error = mpr_wait_command(sc, &cm, 0, CAN_SLEEP);
3466 if (cm != NULL)
3467 mpr_free_command(sc, cm);
3470 mpr_config_complete(sc, cm);
3483 mpr_config_complete(struct mpr_softc *sc, struct mpr_command *cm)
3489 params = cm->cm_complete_data;
3491 if (cm->cm_data != NULL) {
3492 bus_dmamap_sync(sc->buffer_dmat, cm->cm_dmamap,
3494 bus_dmamap_unload(sc->buffer_dmat, cm->cm_dmamap);
3501 if ((cm->cm_flags & MPR_CM_FLAGS_ERROR_MASK) != 0) {
3506 reply = (MPI2_CONFIG_REPLY *)cm->cm_reply;
3526 mpr_free_command(sc, cm);