mlx5/mlx5_ib/mlx5_ib_mr.c

141 	ent->size++;
230 		ent->size--;
402 		ent->size--;
546 			  int npages, int page_shift, int *size,
557 	*size = ALIGN(sizeof(u64) * npages, MLX5_UMR_MTT_ALIGNMENT);
558 	*mr_pas = kmalloc(*size + MLX5_UMR_ALIGN - 1, GFP_KERNEL);
565 	memset(pas + npages, 0, *size - npages * sizeof(u64));
567 	*dma = dma_map_single(ddev, pas, *size, DMA_TO_DEVICE);
681 	int size;
702 	err = dma_map_mr_pas(dev, umem, npages, page_shift, &size, &mr_pas,
727 	mr->mmkey.size = len;
734 	dma_unmap_single(ddev, dma, size, DMA_TO_DEVICE);
756 	int size;
782 	size = sizeof(u64) * pages_to_map;
783 	size = min_t(int, PAGE_SIZE, size);
791 		size = MLX5_UMR_MTT_MIN_CHUNK_SIZE;
794 		memset(pas, 0, size);
796 	pages_iter = size / sizeof(u64);
797 	dma = dma_map_single(ddev, pas, size, DMA_TO_DEVICE);
807 		dma_sync_single_for_cpu(ddev, dma, size, DMA_TO_DEVICE);
819 			memset(pas + npages, 0, size - npages * sizeof(u64));
822 		dma_sync_single_for_device(ddev, dma, size, DMA_TO_DEVICE);
858 	dma_unmap_single(ddev, dma, size, DMA_TO_DEVICE);
1074 	int size;
1083 		err = dma_map_mr_pas(dev, mr->umem, npages, page_shift, &size,
1123 		dma_unmap_single(ddev, dma, size, DMA_TO_DEVICE);
1213 		mr->mmkey.size = len;
1228 	int size = ndescs * desc_size;
1234 	mr->descs_alloc = kzalloc(size + add_size, GFP_KERNEL);
1241 				      size, DMA_TO_DEVICE);
1259 		int size = mr->max_descs * mr->desc_size;
1262 				 size, DMA_TO_DEVICE);
1311 CTASSERT(sizeof(((struct ib_phys_buf *)0)->size) == 8);
1341 			mask |= buffer_list[i].addr + buffer_list[i].size;
1343 		total_size += buffer_list[i].size;
1351 	buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
1356 		npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
1381 		     j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;