mlx5/mlx5_fpga/mlx5fpga_sdk.c

55 mlx5_fpga_sbu_conn_create(struct mlx5_fpga_device *fdev,
60 	return mlx5_fpga_conn_create(fdev, attr, MLX5_FPGA_QPC_QP_TYPE_SANDBOX_QP);
93 	mlx5_fpga_dbg(complete->conn->fdev,
101 static int mem_transaction(struct mlx5_fpga_device *fdev, size_t size, u64 addr,
107 	if (!fdev->shell_conn) {
115 	xfer.t.conn = fdev->shell_conn;
121 		mlx5_fpga_dbg(fdev, "Transfer execution failed: %d\n", ret);
132 static int mlx5_fpga_mem_read_i2c(struct mlx5_fpga_device *fdev, size_t size,
143 	if (!fdev->mdev)
149 		err = mlx5_fpga_access_reg(fdev->mdev, actual_size,
153 			mlx5_fpga_err(fdev, "Failed to read over I2C: %d\n",
164 static int mlx5_fpga_mem_write_i2c(struct mlx5_fpga_device *fdev, size_t size,
175 	if (!fdev->mdev)
181 		err = mlx5_fpga_access_reg(fdev->mdev, actual_size,
185 			mlx5_fpga_err(fdev, "Failed to write FPGA crspace\n");
195 int mlx5_fpga_mem_read(struct mlx5_fpga_device *fdev, size_t size, u64 addr,
201 		access_type = fdev->shell_conn ? MLX5_FPGA_ACCESS_TYPE_RDMA :
204 	mlx5_fpga_dbg(fdev, "Reading %zu bytes at 0x%jx over %s",
209 		ret = mem_transaction(fdev, size, addr, buf, MLX5_FPGA_READ);
214 		ret = mlx5_fpga_mem_read_i2c(fdev, size, addr, buf);
219 		mlx5_fpga_warn(fdev, "Unexpected read access_type %u\n",
228 int mlx5_fpga_mem_write(struct mlx5_fpga_device *fdev, size_t size, u64 addr,
234 		access_type = fdev->shell_conn ? MLX5_FPGA_ACCESS_TYPE_RDMA :
237 	mlx5_fpga_dbg(fdev, "Writing %zu bytes at 0x%jx over %s",
242 		ret = mem_transaction(fdev, size, addr, buf, MLX5_FPGA_WRITE);
247 		ret = mlx5_fpga_mem_write_i2c(fdev, size, addr, buf);
252 		mlx5_fpga_warn(fdev, "Unexpected write access_type %u\n",
261 int mlx5_fpga_get_sbu_caps(struct mlx5_fpga_device *fdev, int size, void *buf)
263 	return mlx5_fpga_sbu_caps(fdev->mdev, buf, size);
267 u64 mlx5_fpga_ddr_size_get(struct mlx5_fpga_device *fdev)
269 	return (u64)MLX5_CAP_FPGA(fdev->mdev, fpga_ddr_size) << 10;
273 u64 mlx5_fpga_ddr_base_get(struct mlx5_fpga_device *fdev)
275 	return MLX5_CAP64_FPGA(fdev->mdev, fpga_ddr_start_addr);
279 void mlx5_fpga_client_data_set(struct mlx5_fpga_device *fdev,
284 	list_for_each_entry(context, &fdev->client_data_list, list) {
291 	mlx5_fpga_warn(fdev, "No client context found for %s\n", client->name);
295 void *mlx5_fpga_client_data_get(struct mlx5_fpga_device *fdev,
301 	list_for_each_entry(context, &fdev->client_data_list, list) {
307 	mlx5_fpga_warn(fdev, "No client context found for %s\n", client->name);
314 void mlx5_fpga_device_query(struct mlx5_fpga_device *fdev,
319 	spin_lock_irqsave(&fdev->state_lock, flags);
320 	query->image_status = fdev->image_status;
321 	query->admin_image = fdev->last_admin_image;
322 	query->oper_image = fdev->last_oper_image;
323 	spin_unlock_irqrestore(&fdev->state_lock, flags);
327 static int mlx5_fpga_device_reload_cmd(struct mlx5_fpga_device *fdev)
329 	struct mlx5_core_dev *mdev = fdev->mdev;
334 	mlx5_fpga_info(fdev, "mlx5/fpga - reload started\n");
335 	fdev->fdev_state = MLX5_FDEV_STATE_IN_PROGRESS;
336 	reinit_completion(&fdev->load_event);
339 		mlx5_fpga_err(fdev, "Failed to request reload: %d\n",
344 	err = wait_for_completion_timeout(&fdev->load_event,
347 		mlx5_fpga_err(fdev, "Failed waiting for reload: %d\n", err);
348 		fdev->fdev_state = MLX5_FDEV_STATE_FAILURE;
354 		mlx5_fpga_err(fdev, "Failed load check for reload: %d\n", err);
355 		fdev->fdev_state = MLX5_FDEV_STATE_FAILURE;
358 	spin_lock_irqsave(&fdev->state_lock, flags);
359 	fdev->fdev_state = MLX5_FDEV_STATE_SUCCESS;
360 	spin_unlock_irqrestore(&fdev->state_lock, flags);
361 	mlx5_fpga_info(fdev, "mlx5/fpga - reload ended\n");
366 int mlx5_fpga_device_reload(struct mlx5_fpga_device *fdev,
369 	struct mlx5_core_dev *mdev = fdev->mdev;
374 	spin_lock_irqsave(&fdev->state_lock, flags);
375 	switch (fdev->fdev_state) {
387 	spin_unlock_irqrestore(&fdev->state_lock, flags);
394 		err = mlx5_fpga_device_reload_cmd(fdev);
404 	fdev->fdev_state = MLX5_FDEV_STATE_IN_PROGRESS;
405 	reinit_completion(&fdev->load_event);
408 		mlx5_fpga_info(fdev, "Loading from flash\n");
411 			mlx5_fpga_err(fdev, "Failed to request load: %d\n",
416 		mlx5_fpga_info(fdev, "Resetting\n");
419 			mlx5_fpga_err(fdev, "Failed to request reset: %d\n",
424 		mlx5_fpga_err(fdev, "Unknown command: %d\n",
430 	err = wait_for_completion_timeout(&fdev->load_event, timeout - jiffies);
432 		mlx5_fpga_err(fdev, "Failed waiting for FPGA load: %d\n", err);
433 		fdev->fdev_state = MLX5_FDEV_STATE_FAILURE;
451 		fdev->fdev_state = MLX5_FDEV_STATE_FAILURE;
468 int mlx5_fpga_flash_select(struct mlx5_fpga_device *fdev,
474 	spin_lock_irqsave(&fdev->state_lock, flags);
475 	switch (fdev->fdev_state) {
477 		spin_unlock_irqrestore(&fdev->state_lock, flags);
485 	spin_unlock_irqrestore(&fdev->state_lock, flags);
487 	err = mlx5_fpga_image_select(fdev->mdev, image);
489 		mlx5_fpga_err(fdev, "Failed to select flash image: %d\n", err);
491 		fdev->last_admin_image = image;
496 int mlx5_fpga_connectdisconnect(struct mlx5_fpga_device *fdev,
502 	spin_lock_irqsave(&fdev->state_lock, flags);
503 	switch (fdev->fdev_state) {
505 		spin_unlock_irqrestore(&fdev->state_lock, flags);
513 	spin_unlock_irqrestore(&fdev->state_lock, flags);
515 	err = mlx5_fpga_ctrl_connect(fdev->mdev, connect);
517 		mlx5_fpga_err(fdev, "Failed to connect/disconnect: %d\n", err);
522 int mlx5_fpga_temperature(struct mlx5_fpga_device *fdev,
525 	return mlx5_fpga_query_mtmp(fdev->mdev, temp);
529 struct device *mlx5_fpga_dev(struct mlx5_fpga_device *fdev)
531 	return &fdev->mdev->pdev->dev;
535 void mlx5_fpga_get_cap(struct mlx5_fpga_device *fdev, u32 *fpga_caps)
539 	spin_lock_irqsave(&fdev->state_lock, flags);
540 	memcpy(fpga_caps, &fdev->mdev->caps.fpga, sizeof(fdev->mdev->caps.fpga));
541 	spin_unlock_irqrestore(&fdev->state_lock, flags);