mlx5/mlx5_fpga/mlx5fpga_conn.c

57 	dma_device = &conn->fdev->mdev->pdev->dev;
62 		mlx5_fpga_warn(conn->fdev, "DMA error on sg 0: %d\n", err);
74 		mlx5_fpga_warn(conn->fdev, "DMA error on sg 1: %d\n", err);
89 	dma_device = &conn->fdev->mdev->pdev->dev;
118 	data->lkey = cpu_to_be32(conn->fdev->conn_res.mkey.key);
138 	mlx5_write64(wqe, conn->fdev->conn_res.uar->map + MLX5_BF_OFFSET, NULL);
158 		data->lkey = cpu_to_be32(conn->fdev->conn_res.mkey.key);
263 		mlx5_fpga_warn(conn->fdev, "RQ buf %p on FPGA QP %u completion status %d\n",
266 		mlx5_fpga_dbg(conn->fdev, "RQ buf %p on FPGA QP %u completion status %d\n",
277 	mlx5_fpga_dbg(conn->fdev, "Message with %u bytes received successfully\n",
284 		mlx5_fpga_warn(conn->fdev,
317 		mlx5_fpga_warn(conn->fdev, "SQ buf %p on FPGA QP %u completion status %d\n",
320 		mlx5_fpga_dbg(conn->fdev, "SQ buf %p on FPGA QP %u completion status %d\n",
326 		buf->complete(conn, conn->fdev, buf, status);
354 		mlx5_fpga_warn(conn->fdev, "Unexpected cqe opcode %u\n",
362 		    conn->fdev->conn_res.uar->map, conn->cq.wq.cc);
371 	mlx5_fpga_warn(conn->fdev, "CQ event %u on CQ #%u\n", event, mcq->cqn);
379 	mlx5_fpga_warn(conn->fdev, "QP event %u on QP #%u\n", event, mqp->qpn);
402 	mlx5_fpga_dbg(conn->fdev, "Re-arming CQ with cc# %u\n", conn->cq.wq.cc);
429 	struct mlx5_fpga_device *fdev = conn->fdev;
430 	struct mlx5_core_dev *mdev = fdev->mdev;
471 	MLX5_SET(cqc, cqc, uar_page, fdev->conn_res.uar->index);
494 	conn->cq.mcq.uar        = fdev->conn_res.uar;
498 	mlx5_fpga_dbg(fdev, "Created CQ #0x%x\n", conn->cq.mcq.cqn);
512 	mlx5_core_destroy_cq(conn->fdev->mdev, &conn->cq.mcq);
518 	struct mlx5_fpga_device *fdev = conn->fdev;
519 	struct mlx5_core_dev *mdev = fdev->mdev;
532 	struct mlx5_fpga_device *fdev = conn->fdev;
533 	struct mlx5_core_dev *mdev = fdev->mdev;
576 	MLX5_SET(qpc, qpc, uar_page, fdev->conn_res.uar->index);
583 	MLX5_SET(qpc, qpc, pd, fdev->conn_res.pdn);
602 	mlx5_fpga_dbg(fdev, "Created QP #0x%x\n", conn->qp.mqp.qpn);
643 		buf->complete(conn, conn->fdev, buf, MLX5_CQE_SYNDROME_WR_FLUSH_ERR);
649 		buf->complete(conn, conn->fdev, buf, MLX5_CQE_SYNDROME_WR_FLUSH_ERR);
655 	mlx5_core_destroy_qp(conn->fdev->mdev, &conn->qp.mqp);
665 	struct mlx5_core_dev *mdev = conn->fdev->mdev;
667 	mlx5_fpga_dbg(conn->fdev, "Modifying QP %u to RST\n", conn->qp.mqp.qpn);
675 	struct mlx5_fpga_device *fdev = conn->fdev;
676 	struct mlx5_core_dev *mdev = fdev->mdev;
680 	mlx5_fpga_dbg(conn->fdev, "Modifying QP %u to INIT\n", conn->qp.mqp.qpn);
692 	MLX5_SET(qpc, qpc, pd, conn->fdev->conn_res.pdn);
700 		mlx5_fpga_warn(fdev, "qp_modify RST2INIT failed: %d\n", err);
711 	struct mlx5_fpga_device *fdev = conn->fdev;
712 	struct mlx5_core_dev *mdev = fdev->mdev;
716 	mlx5_fpga_dbg(conn->fdev, "QP RTR\n");
745 		mlx5_fpga_warn(fdev, "qp_modify RST2INIT failed: %d\n", err);
756 	struct mlx5_fpga_device *fdev = conn->fdev;
757 	struct mlx5_core_dev *mdev = fdev->mdev;
762 	mlx5_fpga_dbg(conn->fdev, "QP RTS\n");
782 		mlx5_fpga_warn(fdev, "qp_modify RST2INIT failed: %d\n", err);
793 	struct mlx5_fpga_device *fdev = conn->fdev;
797 	err = mlx5_fpga_modify_qp(conn->fdev->mdev, conn->fpga_qpn,
800 		mlx5_fpga_err(fdev, "Failed to activate FPGA RC QP: %d\n", err);
806 		mlx5_fpga_err(fdev, "Failed to change QP state to reset\n");
812 		mlx5_fpga_err(fdev, "Failed to modify QP from RESET to INIT\n");
822 		mlx5_fpga_err(fdev, "Failed to change QP state from INIT to RTR\n");
828 		mlx5_fpga_err(fdev, "Failed to change QP state from RTR to RTS\n");
837 	if (mlx5_fpga_modify_qp(conn->fdev->mdev, conn->fpga_qpn,
839 		mlx5_fpga_err(fdev, "Failed to revert FPGA QP to INIT\n");
844 struct mlx5_fpga_conn *mlx5_fpga_conn_create(struct mlx5_fpga_device *fdev,
859 	conn->fdev = fdev;
868 	err = mlx5_query_nic_vport_mac_address(fdev->mdev, 0, remote_mac);
870 		mlx5_fpga_err(fdev, "Failed to query local MAC: %d\n", err);
881 	err = mlx5_core_reserved_gid_alloc(fdev->mdev, &conn->qp.sgid_index);
883 		mlx5_fpga_err(fdev, "Failed to allocate SGID: %d\n", err);
888 	err = mlx5_core_roce_gid_set(fdev->mdev, conn->qp.sgid_index,
893 		mlx5_fpga_err(fdev, "Failed to set SGID: %d\n", err);
897 	mlx5_fpga_dbg(fdev, "Reserved SGID index %u\n", conn->qp.sgid_index);
905 		mlx5_fpga_err(fdev, "Failed to create CQ: %d\n", err);
914 		mlx5_fpga_err(fdev, "Failed to create QP: %d\n", err);
931 	err = mlx5_fpga_create_qp(fdev->mdev, &conn->fpga_qpc,
934 		mlx5_fpga_err(fdev, "Failed to create FPGA RC QP: %d\n", err);
945 	mlx5_fpga_dbg(fdev, "FPGA QPN is %u\n", conn->fpga_qpn);
950 	mlx5_fpga_destroy_qp(conn->fdev->mdev, conn->fpga_qpn);
956 	mlx5_core_roce_gid_set(fdev->mdev, conn->qp.sgid_index, 0, 0, NULL,
959 	mlx5_core_reserved_gid_free(fdev->mdev, conn->qp.sgid_index);
968 	struct mlx5_fpga_device *fdev = conn->fdev;
969 	struct mlx5_core_dev *mdev = fdev->mdev;
976 	mlx5_fpga_destroy_qp(conn->fdev->mdev, conn->fpga_qpn);
980 		mlx5_fpga_warn(fdev, "qp_modify 2ERR failed: %d\n", err);
984 	mlx5_core_roce_gid_set(conn->fdev->mdev, conn->qp.sgid_index, 0, 0,
986 	mlx5_core_reserved_gid_free(conn->fdev->mdev, conn->qp.sgid_index);
990 int mlx5_fpga_conn_device_init(struct mlx5_fpga_device *fdev)
994 	err = mlx5_nic_vport_enable_roce(fdev->mdev);
996 		mlx5_fpga_err(fdev, "Failed to enable RoCE: %d\n", err);
1000 	fdev->conn_res.uar = mlx5_get_uars_page(fdev->mdev);
1001 	if (IS_ERR(fdev->conn_res.uar)) {
1002 		err = PTR_ERR(fdev->conn_res.uar);
1003 		mlx5_fpga_err(fdev, "get_uars_page failed, %d\n", err);
1006 	mlx5_fpga_dbg(fdev, "Allocated UAR index %u\n",
1007 		      fdev->conn_res.uar->index);
1009 	err = mlx5_core_alloc_pd(fdev->mdev, &fdev->conn_res.pdn);
1011 		mlx5_fpga_err(fdev, "alloc pd failed, %d\n", err);
1014 	mlx5_fpga_dbg(fdev, "Allocated PD %u\n", fdev->conn_res.pdn);
1016 	err = mlx5_fpga_conn_create_mkey(fdev->mdev, fdev->conn_res.pdn,
1017 					 &fdev->conn_res.mkey);
1019 		mlx5_fpga_err(fdev, "create mkey failed, %d\n", err);
1022 	mlx5_fpga_dbg(fdev, "Created mkey 0x%x\n", fdev->conn_res.mkey.key);
1027 	mlx5_core_dealloc_pd(fdev->mdev, fdev->conn_res.pdn);
1029 	mlx5_put_uars_page(fdev->mdev, fdev->conn_res.uar);
1031 	mlx5_nic_vport_disable_roce(fdev->mdev);
1036 void mlx5_fpga_conn_device_cleanup(struct mlx5_fpga_device *fdev)
1038 	mlx5_core_destroy_mkey(fdev->mdev, &fdev->conn_res.mkey);
1039 	mlx5_core_dealloc_pd(fdev->mdev, fdev->conn_res.pdn);
1040 	mlx5_put_uars_page(fdev->mdev, fdev->conn_res.uar);
1041 	mlx5_nic_vport_disable_roce(fdev->mdev);