Lines Matching refs:u16
661 u16 num_channels;
666 u16 rx_cq_moderation_usec;
667 u16 rx_cq_moderation_pkts;
668 u16 tx_cq_moderation_usec;
669 u16 tx_cq_moderation_pkts;
670 u16 min_rx_wqes;
674 u16 rx_hash_log_tbl_sz;
677 u16 tx_max_inline;
722 u16 fec_mask_50x[MLX5E_MAX_FEC_50X];
724 u16 fec_avail_50x[MLX5E_MAX_FEC_50X];
800 u16 cc;
803 u16 pc __aligned(MLX5E_CACHELINE_SIZE);
804 u16 bf_offset;
805 u16 cev_counter; /* completion event counter */
806 u16 cev_factor; /* completion event factor */
807 u16 cev_next_state; /* next completion event state */
811 u16 running; /* set if SQ is running */
829 u16 max_inline;
842 mlx5e_sq_has_room_for(struct mlx5e_sq *sq, u16 n)
844 u16 cc = sq->cc;
845 u16 pc = sq->pc;
1056 void mlx5e_vlan_rx_add_vid(void *, struct ifnet *, u16);
1057 void mlx5e_vlan_rx_kill_vid(void *, struct ifnet *, u16);
1066 u16 ofst = MLX5_BF_OFFSET + sq->bf_offset;