mlx4/mlx4_core/mlx4_main.c

445 		struct mlx4_init_hca_param hca_param;
447 		memset(&hca_param, 0, sizeof(hca_param));
448 		err = mlx4_QUERY_HCA(dev, &hca_param);
455 		if (err || hca_param.phv_check_en)
791 				       struct mlx4_init_hca_param *hca_param)
793 	dev->caps.steering_mode = hca_param->steering_mode;
800 			4 * ((1 << hca_param->log_mc_entry_sz)/16 - 2);
812 	struct mlx4_init_hca_param hca_param;
815 	memset(&hca_param, 0, sizeof(hca_param));
816 	err = mlx4_QUERY_HCA(dev, &hca_param);
825 	if (hca_param.global_caps) {
830 	mlx4_log_num_mgm_entry_size = hca_param.log_mc_entry_sz;
832 	dev->caps.hca_core_clock = hca_param.hca_core_clock;
835 	dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp;
855 	dev->uar_page_shift = hca_param.uar_page_sz + 12;
894 	dev->caps.num_qps		= 1 << hca_param.log_num_qps;
895 	dev->caps.num_srqs		= 1 << hca_param.log_num_srqs;
896 	dev->caps.num_cqs		= 1 << hca_param.log_num_cqs;
897 	dev->caps.num_mpts		= 1 << hca_param.log_mpt_sz;
959 	if (hca_param.dev_cap_enabled & MLX4_DEV_CAP_64B_EQE_ENABLED) {
967 	if (hca_param.dev_cap_enabled & MLX4_DEV_CAP_64B_CQE_ENABLED) {
974 	if (hca_param.dev_cap_enabled & MLX4_DEV_CAP_EQE_STRIDE_ENABLED) {
975 		dev->caps.eqe_size = hca_param.eqe_size;
979 	if (hca_param.dev_cap_enabled & MLX4_DEV_CAP_CQE_STRIDE_ENABLED) {
980 		dev->caps.cqe_size = hca_param.cqe_size;
988 	slave_adjust_steering_mode(dev, &dev_cap, &hca_param);
990 		 hca_param.rss_ip_frags ? "on" : "off");