liquidio/base/lio_device.c

206 __lio_retrieve_config_info(struct octeon_device *oct, uint16_t card_type)
209 	uint32_t	oct_id = oct->octeon_id;
213 		if (oct->chip_id == LIO_CN23XX_PF_VID) {
225 lio_get_config_info(struct octeon_device *oct, uint16_t card_type)
229 	conf = __lio_retrieve_config_info(oct, card_type);
258 lio_free_device_mem(struct octeon_device *oct)
262 	for (i = 0; i < LIO_MAX_OUTPUT_QUEUES(oct); i++) {
263 		if ((oct->io_qmask.oq & BIT_ULL(i)) && (oct->droq[i]))
264 			free(oct->droq[i], M_DEVBUF);
267 	for (i = 0; i < LIO_MAX_INSTR_QUEUES(oct); i++) {
268 		if ((oct->io_qmask.iq & BIT_ULL(i)) && (oct->instr_queue[i]))
269 			free(oct->instr_queue[i], M_DEVBUF);
272 	i = oct->octeon_id;
273 	free(oct->chip, M_DEVBUF);
282 	struct octeon_device	*oct;
307 	oct = (struct octeon_device *)device_get_softc(device);
308 	oct->chip = (void *)(buf);
309 	oct->dispatch.dlist = (struct lio_dispatch *)(buf + configsize);
311 	return (oct);
317 	struct octeon_device	*oct = NULL;
327 		oct = lio_allocate_device_mem(device);
328 		if (oct != NULL) {
330 			octeon_device[oct_idx] = oct;
336 	if (oct == NULL)
339 	mtx_init(&oct->pci_win_lock, "pci_win_lock", NULL, MTX_DEF);
340 	mtx_init(&oct->mem_access_lock, "mem_access_lock", NULL, MTX_DEF);
342 	oct->octeon_id = oct_idx;
343 	snprintf(oct->device_name, sizeof(oct->device_name), "%s%d",
344 		 LIO_DRV_NAME, oct->octeon_id);
346 	return (oct);
351  *  @param oct        - pointer to the octeon device structure.
359 lio_register_device(struct octeon_device *oct, int bus, int dev, int func,
364 	oct->loc.bus = bus;
365 	oct->loc.dev = dev;
366 	oct->loc.func = func;
368 	oct->adapter_refcount = &lio_adapter_refcounts[oct->octeon_id];
369 	atomic_store_rel_int(oct->adapter_refcount, 0);
372 	for (idx = (int)oct->octeon_id - 1; idx >= 0; idx--) {
374 			lio_dev_err(oct, "%s: Internal driver error, missing dev\n",
377 			atomic_add_int(oct->adapter_refcount, 1);
384 			oct->adapter_refcount =
392 	atomic_add_int(oct->adapter_refcount, 1);
393 	refcount = atomic_load_acq_int(oct->adapter_refcount);
395 	lio_dev_dbg(oct, "%s: %02x:%02x:%d refcount %u\n", __func__,
396 		    oct->loc.bus, oct->loc.dev, oct->loc.func, refcount);
403  *  @param oct - pointer to the octeon device structure.
407 lio_deregister_device(struct octeon_device *oct)
411 	atomic_subtract_int(oct->adapter_refcount, 1);
412 	refcount = atomic_load_acq_int(oct->adapter_refcount);
414 	lio_dev_dbg(oct, "%s: %04d:%02d:%d refcount %u\n", __func__,
415 		    oct->loc.bus, oct->loc.dev, oct->loc.func, refcount);
421 lio_allocate_ioq_vector(struct octeon_device *oct)
426 	if (LIO_CN23XX_PF(oct))
427 		num_ioqs = oct->sriov_info.num_pf_rings;
431 	oct->ioq_vector = malloc(size, M_DEVBUF, M_NOWAIT | M_ZERO);
432 	if (oct->ioq_vector == NULL)
436 		ioq_vector = &oct->ioq_vector[i];
437 		ioq_vector->oct_dev = oct;
442 		if (oct->chip_id == LIO_CN23XX_PF_VID)
443 			ioq_vector->ioq_num = i + oct->sriov_info.pf_srn;
451 lio_free_ioq_vector(struct octeon_device *oct)
454 	free(oct->ioq_vector, M_DEVBUF);
455 	oct->ioq_vector = NULL;
460 lio_setup_instr_queue0(struct octeon_device *oct)
466 	if (LIO_CN23XX_PF(oct))
468 			LIO_GET_NUM_DEF_TX_DESCS_CFG(LIO_CHIP_CONF(oct,
471 	oct->num_iqs = 0;
473 	oct->instr_queue[0]->q_index = 0;
474 	oct->instr_queue[0]->app_ctx = (void *)(size_t)0;
475 	oct->instr_queue[0]->ifidx = 0;
478 	txpciq.s.pkind = oct->pfvf_hsword.pkind;
481 	if (lio_init_instr_queue(oct, txpciq, num_descs)) {
483 		lio_delete_instr_queue(oct, 0);
487 	oct->num_iqs++;
492 lio_setup_output_queue0(struct octeon_device *oct)
496 	if (LIO_CN23XX_PF(oct)) {
498 			LIO_GET_NUM_DEF_RX_DESCS_CFG(LIO_CHIP_CONF(oct,
501 			LIO_GET_DEF_RX_BUF_SIZE_CFG(LIO_CHIP_CONF(oct,
505 	oct->num_oqs = 0;
507 	if (lio_init_droq(oct, oq_no, num_descs, desc_size, NULL)) {
511 	oct->num_oqs++;
517 lio_init_dispatch_list(struct octeon_device *oct)
521 	oct->dispatch.count = 0;
524 		oct->dispatch.dlist[i].opcode = 0;
525 		STAILQ_INIT(&oct->dispatch.dlist[i].head);
528 	mtx_init(&oct->dispatch.lock, "dispatch_lock", NULL, MTX_DEF);
534 lio_delete_dispatch_list(struct octeon_device *oct)
542 	mtx_lock(&oct->dispatch.lock);
547 		dispatch = &oct->dispatch.dlist[i].head;
550 			STAILQ_REMOVE_HEAD(&oct->dispatch.dlist[i].head,
555 		oct->dispatch.dlist[i].opcode = 0;
558 	oct->dispatch.count = 0;
560 	mtx_unlock(&oct->dispatch.lock);
628 lio_register_dispatch_fn(struct octeon_device *oct, uint16_t opcode,
637 	mtx_lock(&oct->dispatch.lock);
639 	if (oct->dispatch.dlist[idx].opcode == 0) {
640 		oct->dispatch.dlist[idx].opcode = combined_opcode;
641 		oct->dispatch.dlist[idx].dispatch_fn = fn;
642 		oct->dispatch.dlist[idx].arg = fn_arg;
643 		oct->dispatch.count++;
644 		mtx_unlock(&oct->dispatch.lock);
648 	mtx_unlock(&oct->dispatch.lock);
654 	pfn = lio_get_dispatch(oct, opcode, subcode);
658 		lio_dev_dbg(oct,
664 			lio_dev_err(oct,
677 		mtx_lock(&oct->dispatch.lock);
678 		STAILQ_INSERT_HEAD(&oct->dispatch.dlist[idx].head,
680 		oct->dispatch.count++;
681 		mtx_unlock(&oct->dispatch.lock);
684 		lio_dev_err(oct, "Found previously registered dispatch fn for opcode/subcode: %x/%x\n",
695  *   oct       - octeon device
707 lio_unregister_dispatch_fn(struct octeon_device *oct, uint16_t opcode,
718 	mtx_lock(&oct->dispatch.lock);
720 	if (oct->dispatch.count == 0) {
721 		mtx_unlock(&oct->dispatch.lock);
722 		lio_dev_err(oct, "No dispatch functions registered for this device\n");
725 	if (oct->dispatch.dlist[idx].opcode == combined_opcode) {
726 		dispatch_head = &oct->dispatch.dlist[idx].head;
729 			oct->dispatch.dlist[idx].opcode =
731 			oct->dispatch.dlist[idx].dispatch_fn =
733 			oct->dispatch.dlist[idx].arg =
738 			oct->dispatch.dlist[idx].opcode = 0;
739 			oct->dispatch.dlist[idx].dispatch_fn = NULL;
740 			oct->dispatch.dlist[idx].arg = NULL;
745 				    &oct->dispatch.dlist[idx].head,
749 				STAILQ_REMOVE(&oct->dispatch.dlist[idx].head,
759 		oct->dispatch.count--;
761 	mtx_unlock(&oct->dispatch.lock);
770 	struct octeon_device	*oct = (struct octeon_device *)buf;
777 	if (LIO_CN23XX_PF(oct))
779 					       LIO_CHIP_CONF(oct, cn23xx_pf));
781 	if (atomic_load_acq_int(&oct->status) >= LIO_DEV_RUNNING) {
782 		lio_dev_err(oct, "Received CORE OK when device state is 0x%x\n",
783 			    atomic_load_acq_int(&oct->status));
791 	oct->app_mode = (uint32_t)recv_pkt->rh.r_core_drv_init.app_mode;
793 		oct->fw_info.max_nic_ports =
795 		oct->fw_info.num_gmx_ports =
799 	if (oct->fw_info.max_nic_ports < num_nic_ports) {
800 		lio_dev_err(oct, "Config has more ports than firmware allows (%d > %d).\n",
801 			    num_nic_ports, oct->fw_info.max_nic_ports);
805 	oct->fw_info.app_cap_flags = recv_pkt->rh.r_core_drv_init.app_cap_flags;
806 	oct->fw_info.app_mode = (uint32_t)recv_pkt->rh.r_core_drv_init.app_mode;
807 	oct->pfvf_hsword.app_mode =
810 	oct->pfvf_hsword.pkind = recv_pkt->rh.r_core_drv_init.pkind;
812 	for (i = 0; i < oct->num_iqs; i++)
813 		oct->instr_queue[i]->txpciq.s.pkind = oct->pfvf_hsword.pkind;
815 	atomic_store_rel_int(&oct->status, LIO_DEV_CORE_OK);
817 	cs = &core_setup[oct->octeon_id];
820 		lio_dev_dbg(oct, "Core setup bytes expected %llu found %d\n",
827 	strncpy(oct->boardinfo.name, cs->boardname, LIO_BOARD_NAME);
828 	strncpy(oct->boardinfo.serial_number, cs->board_serial_number,
833 	oct->boardinfo.major = cs->board_rev_major;
834 	oct->boardinfo.minor = cs->board_rev_minor;
836 	lio_dev_info(oct, "Running %s (%llu Hz)\n", app_name,
848 lio_get_tx_qsize(struct octeon_device *oct, uint32_t q_no)
851 	if ((oct != NULL) && (q_no < (uint32_t)LIO_MAX_INSTR_QUEUES(oct)) &&
852 	    (oct->io_qmask.iq & BIT_ULL(q_no)))
853 		return (oct->instr_queue[q_no]->max_count);
860 lio_get_rx_qsize(struct octeon_device *oct, uint32_t q_no)
863 	if ((oct != NULL) && (q_no < (uint32_t)LIO_MAX_OUTPUT_QUEUES(oct)) &&
864 	    (oct->io_qmask.oq & BIT_ULL(q_no)))
865 		return (oct->droq[q_no]->max_count);
872 lio_get_conf(struct octeon_device *oct)
880 	if (LIO_CN23XX_PF(oct)) {
882 					       LIO_CHIP_CONF(oct, cn23xx_pf));
905 lio_pci_readq(struct octeon_device *oct, uint64_t addr)
910 	mtx_lock(&oct->pci_win_lock);
917 	if (oct->chip_id == LIO_CN23XX_PF_VID)
919 	lio_write_csr32(oct, oct->reg_list.pci_win_rd_addr_hi, addrhi);
922 	val32 = lio_read_csr32(oct, oct->reg_list.pci_win_rd_addr_hi);
924 	lio_write_csr32(oct, oct->reg_list.pci_win_rd_addr_lo,
926 	val32 = lio_read_csr32(oct, oct->reg_list.pci_win_rd_addr_lo);
928 	val64 = lio_read_csr64(oct, oct->reg_list.pci_win_rd_data);
930 	mtx_unlock(&oct->pci_win_lock);
936 lio_pci_writeq(struct octeon_device *oct, uint64_t val, uint64_t addr)
940 	mtx_lock(&oct->pci_win_lock);
942 	lio_write_csr64(oct, oct->reg_list.pci_win_wr_addr, addr);
945 	lio_write_csr32(oct, oct->reg_list.pci_win_wr_data_hi, val >> 32);
947 	val32 = lio_read_csr32(oct, oct->reg_list.pci_win_wr_data_hi);
949 	lio_write_csr32(oct, oct->reg_list.pci_win_wr_data_lo,
952 	mtx_unlock(&oct->pci_win_lock);
956 lio_mem_access_ok(struct octeon_device *oct)
962 	if (LIO_CN23XX_PF(oct)) {
963 		lmc0_reset_ctl = lio_pci_readq(oct, LIO_CN23XX_LMC0_RESET_CTL);
972 lio_wait_for_ddr_init(struct octeon_device *oct, unsigned long *timeout)
981 		ret = lio_mem_access_ok(oct);
1013 	struct octeon_device *oct = NULL;
1019 		oct = droq->oct_dev;
1022 		lio_write_csr32(oct, droq->pkts_sent_reg,
1031 		oct = iq->oct_dev;
1033 		lio_write_csr32(oct, iq->inst_cnt_reg, iq->pkt_in_done);
1049 	if ((oct != NULL) && (LIO_CN23XX_PF(oct))) {
1051 			lio_write_csr64(oct, droq->pkts_sent_reg,
1056 			instr_cnt = lio_read_csr64(oct, iq->inst_cnt_reg);
1057 			lio_write_csr64(oct, iq->inst_cnt_reg,