dev/ixl/if_ixlv.c

97 static void	ixlv_free_queue(struct ixlv_sc *sc, struct ixl_queue *que);
904 	struct ixl_queue	*que = vsi->queues;
954 	for (int i = 0; i < vsi->num_queues; i++, que++) {
955 		struct  rx_ring	*rxr = &que->rxr;
957 		ixl_init_tx_ring(que);
963 		ixl_init_rx_ring(que);
1379 ixlv_free_msix_resources(struct ixlv_sc *sc, struct ixl_queue *que)
1386 	if (que->tag != NULL) {
1387 		bus_teardown_intr(dev, que->res, que->tag);
1388 		que->tag = NULL;
1390 	if (que->res != NULL) {
1391 		int rid = que->msix + 1;
1392 		bus_release_resource(dev, SYS_RES_IRQ, rid, que->res);
1393 		que->res = NULL;
1395 	if (que->tq != NULL) {
1396 		taskqueue_free(que->tq);
1397 		que->tq = NULL;
1445 	struct 		ixl_queue *que = vsi->queues;
1452 	for (int i = 0; i < vsi->num_queues; i++, vector++, que++) {
1455 		txr = &que->txr;
1456 		que->res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
1458 		if (que->res == NULL) {
1460 		    	    " bus resource: que interrupt [%d]\n", vector);
1464 		error = bus_setup_intr(dev, que->res,
1466 		    ixlv_msix_que, que, &que->tag);
1468 			que->tag = NULL;
1469 			device_printf(dev, "Failed to register que handler");
1472 		bus_describe_intr(dev, que->res, que->tag, "que %d", i);
1477 		bus_bind_intr(dev, que->res, cpu_id);
1478 		que->msix = vector;
1479 		TASK_INIT(&que->tx_task, 0, ixl_deferred_mq_start, que);
1480 		TASK_INIT(&que->task, 0, ixlv_handle_que, que);
1481 		que->tq = taskqueue_create_fast("ixlv_que", M_NOWAIT,
1482 		    taskqueue_thread_enqueue, &que->tq);
1485 		taskqueue_start_threads_cpuset(&que->tq, 1, PI_NET,
1489                 taskqueue_start_threads(&que->tq, 1, PI_NET,
1490                     "%s que", device_get_nameunit(dev));
1596 	struct ixl_queue	*que = vsi->queues;
1627 	ifp->if_snd.ifq_maxlen = que->num_tx_desc - 2;
1691 ixlv_setup_queue(struct ixlv_sc *sc, struct ixl_queue *que)
1699 	txr = &que->txr;
1700 	txr->que = que;
1701 	txr->tail = I40E_QTX_TAIL1(que->me);
1704 	    device_get_nameunit(dev), que->me);
1714 		tsize = roundup2((que->num_tx_desc *
1718 		tsize = roundup2((que->num_tx_desc *
1731 	if (ixl_allocate_tx_data(que)) {
1750 	rsize = roundup2(que->num_rx_desc *
1752 	rxr = &que->rxr;
1753 	rxr->que = que;
1754 	rxr->tail = I40E_QRX_TAIL1(que->me);
1758 	    device_get_nameunit(dev), que->me);
1772 	if (ixl_allocate_rx_data(que)) {
1788 	ixl_free_que_tx(que);
1805 	struct ixl_queue	*que;
1823 		que = &vsi->queues[i];
1824 		que->num_tx_desc = vsi->num_tx_desc;
1825 		que->num_rx_desc = vsi->num_rx_desc;
1826 		que->me = i;
1827 		que->vsi = vsi;
1829 		if (ixlv_setup_queue(sc, que)) {
2012 	struct ixl_queue	*que = vsi->queues;
2015 	for (int i = 0; i < vsi->num_queues; i++, que++)
2016 		ixlv_enable_queue_irq(hw, que->me);
2023         struct ixl_queue       *que = vsi->queues;
2026 	for (int i = 0; i < vsi->num_queues; i++, que++)
2027 		ixlv_disable_queue_irq(hw, que->me);
2081 	struct ixl_queue	*que = vsi->queues;
2086 	for (int i = 0; i < vsi->num_queues; i++, que++) {
2087 		struct tx_ring	*txr = &que->txr;
2088 		struct rx_ring 	*rxr = &que->rxr;
2107 ixlv_set_queue_rx_itr(struct ixl_queue *que)
2109 	struct ixl_vsi	*vsi = que->vsi;
2111 	struct rx_ring	*rxr = &que->rxr;
2158 			    que->me), rxr->itr);
2167 			    que->me), rxr->itr);
2181 ixlv_set_queue_tx_itr(struct ixl_queue *que)
2183 	struct ixl_vsi	*vsi = que->vsi;
2185 	struct tx_ring	*txr = &que->txr;
2231 			    que->me), txr->itr);
2241 			    que->me), txr->itr);
2258 	struct ixl_queue *que = context;
2259 	struct ixl_vsi *vsi = que->vsi;
2261 	struct tx_ring  *txr = &que->txr;
2266 		more = ixl_rxeof(que, IXL_RX_LIMIT);
2268 		ixl_txeof(que);
2273 			taskqueue_enqueue(que->tq, &que->task);
2279 	ixlv_enable_queue_irq(hw, que->me);
2292 	struct ixl_queue	*que = arg;
2293 	struct ixl_vsi	*vsi = que->vsi;
2295 	struct tx_ring	*txr = &que->txr;
2305 	ixlv_disable_queue_irq(hw, que->me);
2307 	++que->irqs;
2309 	more_rx = ixl_rxeof(que, IXL_RX_LIMIT);
2312 	more_tx = ixl_txeof(que);
2322 	ixlv_set_queue_rx_itr(que);
2323 	ixlv_set_queue_tx_itr(que);
2326 		taskqueue_enqueue(que->tq, &que->task);
2328 		ixlv_enable_queue_irq(hw, que->me);
2674 ixlv_free_queue(struct ixlv_sc *sc, struct ixl_queue *que)
2676 	struct tx_ring *txr = &que->txr;
2677 	struct rx_ring *rxr = &que->rxr;
2684 	ixl_free_que_tx(que);
2693 	ixl_free_que_rx(que);
2709 	struct ixl_queue	*que = vsi->queues;
2711 	for (int i = 0; i < vsi->num_queues; i++, que++) {
2713 		ixlv_free_msix_resources(sc, que);
2715 		ixlv_free_queue(sc, que);
3141 	struct ixl_queue *que;
3145 	que = ((struct ixl_queue *)oidp->oid_arg1);
3146 	if (!que) return 0;
3148 	val = rd32(que->vsi->hw, que->txr.tail);
3163 	struct ixl_queue *que;
3167 	que = ((struct ixl_queue *)oidp->oid_arg1);
3168 	if (!que) return 0;
3170 	val = rd32(que->vsi->hw, que->rxr.tail);