dev/ixgbe/ixgbe_mbx.c

40  *  @hw: pointer to the HW structure
45 static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
47 	struct ixgbe_mbx_info *mbx = &hw->mbx;
55 	while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {
72  *  @hw: pointer to the HW structure
77 static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
79 	struct ixgbe_mbx_info *mbx = &hw->mbx;
87 	while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {
104  *  @hw: pointer to the HW structure
112 static s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
115 	struct ixgbe_mbx_info *mbx = &hw->mbx;
123 	ret_val = ixgbe_poll_for_msg(hw, mbx_id);
127 		ret_val = mbx->ops.read(hw, msg, size, mbx_id);
134  *  @hw: pointer to the HW structure
142 static s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
145 	struct ixgbe_mbx_info *mbx = &hw->mbx;
155 	ret_val = mbx->ops.write(hw, msg, size, mbx_id);
159 		ret_val = ixgbe_poll_for_ack(hw, mbx_id);
166  *  @hw: pointer to the HW structure
170 void ixgbe_init_mbx_ops_generic(struct ixgbe_hw *hw)
172 	struct ixgbe_mbx_info *mbx = &hw->mbx;
180  *  @hw: pointer to the HW structure
185 static u32 ixgbe_read_v2p_mailbox(struct ixgbe_hw *hw)
187 	u32 v2p_mailbox = IXGBE_READ_REG(hw, IXGBE_VFMAILBOX);
189 	v2p_mailbox |= hw->mbx.v2p_mailbox;
190 	hw->mbx.v2p_mailbox |= v2p_mailbox & IXGBE_VFMAILBOX_R2C_BITS;
197  *  @hw: pointer to the HW structure
203 static s32 ixgbe_check_for_bit_vf(struct ixgbe_hw *hw, u32 mask)
205 	u32 v2p_mailbox = ixgbe_read_v2p_mailbox(hw);
211 	hw->mbx.v2p_mailbox &= ~mask;
218  *  @hw: pointer to the HW structure
223 static s32 ixgbe_check_for_msg_vf(struct ixgbe_hw *hw, u16 mbx_id)
230 	if (!ixgbe_check_for_bit_vf(hw, IXGBE_VFMAILBOX_PFSTS)) {
232 		hw->mbx.stats.reqs++;
240  *  @hw: pointer to the HW structure
245 static s32 ixgbe_check_for_ack_vf(struct ixgbe_hw *hw, u16 mbx_id)
252 	if (!ixgbe_check_for_bit_vf(hw, IXGBE_VFMAILBOX_PFACK)) {
254 		hw->mbx.stats.acks++;
262  *  @hw: pointer to the HW structure
267 static s32 ixgbe_check_for_rst_vf(struct ixgbe_hw *hw, u16 mbx_id)
274 	if (!ixgbe_check_for_bit_vf(hw, (IXGBE_VFMAILBOX_RSTD |
277 		hw->mbx.stats.rsts++;
285  *  @hw: pointer to the HW structure
289 static s32 ixgbe_obtain_mbx_lock_vf(struct ixgbe_hw *hw)
296 	IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_VFU);
299 	if (ixgbe_read_v2p_mailbox(hw) & IXGBE_VFMAILBOX_VFU)
307  *  @hw: pointer to the HW structure
314 static s32 ixgbe_write_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,
325 	ret_val = ixgbe_obtain_mbx_lock_vf(hw);
330 	ixgbe_check_for_msg_vf(hw, 0);
331 	ixgbe_check_for_ack_vf(hw, 0);
335 		IXGBE_WRITE_REG_ARRAY(hw, IXGBE_VFMBMEM, i, msg[i]);
338 	hw->mbx.stats.msgs_tx++;
341 	IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_REQ);
349  *  @hw: pointer to the HW structure
356 static s32 ixgbe_read_mbx_vf(struct ixgbe_hw *hw, u32 *msg, u16 size,
366 	ret_val = ixgbe_obtain_mbx_lock_vf(hw);
372 		msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_VFMBMEM, i);
375 	IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_ACK);
378 	hw->mbx.stats.msgs_rx++;
386  *  @hw: pointer to the HW structure
388  *  Initializes the hw->mbx struct to correct values for vf mailbox
390 void ixgbe_init_mbx_params_vf(struct ixgbe_hw *hw)
392 	struct ixgbe_mbx_info *mbx = &hw->mbx;
416 static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)
418 	u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index));
423 		IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask);
431  *  @hw: pointer to the HW structure
436 static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number)
444 	if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit,
447 		hw->mbx.stats.reqs++;
455  *  @hw: pointer to the HW structure
460 static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number)
468 	if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit,
471 		hw->mbx.stats.acks++;
479  *  @hw: pointer to the HW structure
484 static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
493 	switch (hw->mac.type) {
495 		vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset));
501 		vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset));
509 		IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift));
510 		hw->mbx.stats.rsts++;
518  *  @hw: pointer to the HW structure
523 static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)
531 	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU);
534 	p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number));
547  *  @hw: pointer to the HW structure
554 static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
563 	ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
568 	ixgbe_check_for_msg_pf(hw, vf_number);
569 	ixgbe_check_for_ack_pf(hw, vf_number);
573 		IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i, msg[i]);
576 	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS);
579 	hw->mbx.stats.msgs_tx++;
588  *  @hw: pointer to the HW structure
597 static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
606 	ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
612 		msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i);
615 	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK);
618 	hw->mbx.stats.msgs_rx++;
626  *  @hw: pointer to the HW structure
628  *  Initializes the hw->mbx struct to correct values for pf mailbox
630 void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
632 	struct ixgbe_mbx_info *mbx = &hw->mbx;
634 	if (hw->mac.type != ixgbe_mac_82599EB &&
635 	    hw->mac.type != ixgbe_mac_X550 &&
636 	    hw->mac.type != ixgbe_mac_X550EM_x &&
637 	    hw->mac.type != ixgbe_mac_X550EM_a &&
638 	    hw->mac.type != ixgbe_mac_X540)