Lines Matching refs:rxr

1145 ixgbe_setup_hw_rsc(struct rx_ring *rxr)
1147 struct adapter *adapter = rxr->adapter;
1153 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(rxr->me));
1170 rscctrl = IXGBE_READ_REG(hw, IXGBE_RSCCTL(rxr->me));
1176 if (rxr->mbuf_sz == MCLBYTES)
1178 else if (rxr->mbuf_sz == MJUMPAGESIZE)
1180 else if (rxr->mbuf_sz == MJUM9BYTES)
1185 IXGBE_WRITE_REG(hw, IXGBE_RSCCTL(rxr->me), rscctrl);
1195 rxr->hw_rsc = TRUE;
1208 ixgbe_refresh_mbufs(struct rx_ring *rxr, int limit)
1210 struct adapter *adapter = rxr->adapter;
1217 i = j = rxr->next_to_refresh;
1219 if (++j == rxr->num_desc)
1223 rxbuf = &rxr->rx_buffers[i];
1226 rxr->mbuf_sz);
1234 mp->m_pkthdr.len = mp->m_len = rxr->mbuf_sz;
1241 bus_dmamap_unload(rxr->ptag, rxbuf->pmap);
1242 error = bus_dmamap_load_mbuf_sg(rxr->ptag, rxbuf->pmap,
1251 bus_dmamap_sync(rxr->ptag, rxbuf->pmap,
1253 rxbuf->addr = rxr->rx_base[i].read.pkt_addr =
1256 rxr->rx_base[i].read.pkt_addr = rxbuf->addr;
1263 rxr->next_to_refresh = i;
1264 if (++j == rxr->num_desc)
1270 IXGBE_WRITE_REG(&adapter->hw, rxr->tail, rxr->next_to_refresh);
1284 ixgbe_allocate_receive_buffers(struct rx_ring *rxr)
1286 struct adapter *adapter = rxr->adapter;
1291 bsize = sizeof(struct ixgbe_rx_buf) * rxr->num_desc;
1292 rxr->rx_buffers = (struct ixgbe_rx_buf *)malloc(bsize, M_DEVBUF,
1294 if (rxr->rx_buffers == NULL) {
1314 &rxr->ptag);
1320 for (int i = 0; i < rxr->num_desc; i++, rxbuf++) {
1321 rxbuf = &rxr->rx_buffers[i];
1322 error = bus_dmamap_create(rxr->ptag, 0, &rxbuf->pmap);
1342 ixgbe_free_receive_ring(struct rx_ring *rxr)
1344 for (int i = 0; i < rxr->num_desc; i++) {
1345 ixgbe_rx_discard(rxr, i);
1355 ixgbe_setup_receive_ring(struct rx_ring *rxr)
1361 struct lro_ctrl *lro = &rxr->lro;
1363 struct netmap_adapter *na = NA(rxr->adapter->ifp);
1369 adapter = rxr->adapter;
1374 IXGBE_RX_LOCK(rxr);
1378 slot = netmap_reset(na, NR_RX, rxr->me, 0);
1383 bzero((void *)rxr->rx_base, rsize);
1385 rxr->mbuf_sz = adapter->rx_mbuf_sz;
1388 ixgbe_free_receive_ring(rxr);
1391 for (int j = 0; j != rxr->num_desc; ++j) {
1394 rxbuf = &rxr->rx_buffers[j];
1405 int sj = netmap_idx_n2k(na->rx_rings[rxr->me], j);
1410 netmap_load_map(na, rxr->ptag, rxbuf->pmap, addr);
1412 rxr->rx_base[j].read.pkt_addr = htole64(paddr);
1426 mp->m_pkthdr.len = mp->m_len = rxr->mbuf_sz;
1428 error = bus_dmamap_load_mbuf_sg(rxr->ptag, rxbuf->pmap, mp, seg,
1432 bus_dmamap_sync(rxr->ptag, rxbuf->pmap, BUS_DMASYNC_PREREAD);
1434 rxr->rx_base[j].read.pkt_addr = htole64(seg[0].ds_addr);
1440 rxr->next_to_check = 0;
1441 rxr->next_to_refresh = 0;
1442 rxr->lro_enabled = FALSE;
1443 rxr->rx_copies = 0;
1444 rxr->rx_bytes = 0;
1445 rxr->vtag_strip = FALSE;
1447 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
1454 ixgbe_setup_hw_rsc(rxr);
1462 rxr->lro_enabled = TRUE;
1466 IXGBE_RX_UNLOCK(rxr);
1471 ixgbe_free_receive_ring(rxr);
1472 IXGBE_RX_UNLOCK(rxr);
1483 struct rx_ring *rxr = adapter->rx_rings;
1486 for (j = 0; j < adapter->num_queues; j++, rxr++)
1487 if (ixgbe_setup_receive_ring(rxr))
1498 rxr = &adapter->rx_rings[i];
1499 IXGBE_RX_LOCK(rxr);
1500 ixgbe_free_receive_ring(rxr);
1501 IXGBE_RX_UNLOCK(rxr);
1514 struct rx_ring *rxr = adapter->rx_rings;
1518 for (int i = 0; i < adapter->num_queues; i++, rxr++) {
1519 ixgbe_free_receive_buffers(rxr);
1521 tcp_lro_free(&rxr->lro);
1523 ixgbe_dma_free(adapter, &rxr->rxdma);
1534 ixgbe_free_receive_buffers(struct rx_ring *rxr)
1536 struct adapter *adapter = rxr->adapter;
1542 if (rxr->rx_buffers != NULL) {
1544 rxbuf = &rxr->rx_buffers[i];
1545 ixgbe_rx_discard(rxr, i);
1547 bus_dmamap_destroy(rxr->ptag, rxbuf->pmap);
1551 if (rxr->rx_buffers != NULL) {
1552 free(rxr->rx_buffers, M_DEVBUF);
1553 rxr->rx_buffers = NULL;
1557 if (rxr->ptag != NULL) {
1558 bus_dma_tag_destroy(rxr->ptag);
1559 rxr->ptag = NULL;
1569 ixgbe_rx_input(struct rx_ring *rxr, struct ifnet *ifp, struct mbuf *m,
1577 if (rxr->lro_enabled &&
1592 if (rxr->lro.lro_cnt != 0)
1593 if (tcp_lro_rx(&rxr->lro, m, 0) == 0)
1596 IXGBE_RX_UNLOCK(rxr);
1598 IXGBE_RX_LOCK(rxr);
1605 ixgbe_rx_discard(struct rx_ring *rxr, int i)
1609 rbuf = &rxr->rx_buffers[i];
1620 bus_dmamap_sync(rxr->ptag, rbuf->pmap, BUS_DMASYNC_POSTREAD);
1625 bus_dmamap_sync(rxr->ptag, rbuf->pmap, BUS_DMASYNC_POSTREAD);
1629 bus_dmamap_unload(rxr->ptag, rbuf->pmap);
1650 struct rx_ring *rxr = que->rxr;
1652 struct lro_ctrl *lro = &rxr->lro;
1660 IXGBE_RX_LOCK(rxr);
1665 if (netmap_rx_irq(ifp, rxr->me, &processed)) {
1666 IXGBE_RX_UNLOCK(rxr);
1672 for (i = rxr->next_to_check; count != 0;) {
1680 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
1683 cur = &rxr->rx_base[i];
1697 rbuf = &rxr->rx_buffers[i];
1711 rxr->rx_discarded++;
1712 ixgbe_rx_discard(rxr, i);
1716 bus_dmamap_sync(rxr->ptag, rbuf->pmap, BUS_DMASYNC_POSTREAD);
1735 if (rxr->hw_rsc == TRUE) {
1737 rxr->rsc_num += (rsc - 1);
1747 nbuf = &rxr->rx_buffers[nextp];
1780 rxr->rx_copies++;
1802 rxr->rx_packets++;
1804 rxr->bytes += sendmp->m_pkthdr.len;
1805 rxr->rx_bytes += sendmp->m_pkthdr.len;
1807 if ((rxr->vtag_strip) && (staterr & IXGBE_RXD_STAT_VP))
1873 bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
1877 if (++i == rxr->num_desc)
1882 rxr->next_to_check = i;
1883 ixgbe_rx_input(rxr, ifp, sendmp, ptype);
1884 i = rxr->next_to_check;
1889 ixgbe_refresh_mbufs(rxr, i);
1895 if (ixgbe_rx_unrefreshed(rxr))
1896 ixgbe_refresh_mbufs(rxr, i);
1898 rxr->next_to_check = i;
1905 IXGBE_RX_UNLOCK(rxr);
2050 struct rx_ring *rxr;
2141 rxr = &adapter->rx_rings[i];
2143 rxr->adapter = adapter;
2145 rxr->me = ixgbe_vf_que_index(adapter->iov_mode, adapter->pool,
2147 rxr->num_desc = adapter->num_rx_desc;
2150 snprintf(rxr->mtx_name, sizeof(rxr->mtx_name), "%s:rx(%d)",
2151 device_get_nameunit(dev), rxr->me);
2152 mtx_init(&rxr->rx_mtx, rxr->mtx_name, NULL, MTX_DEF);
2154 if (ixgbe_dma_malloc(adapter, rsize, &rxr->rxdma,
2161 rxr->rx_base = (union ixgbe_adv_rx_desc *)rxr->rxdma.dma_vaddr;
2162 bzero((void *)rxr->rx_base, rsize);
2165 if (ixgbe_allocate_receive_buffers(rxr)) {
2181 que->rxr = &adapter->rx_rings[i];
2187 for (rxr = adapter->rx_rings; rxconf > 0; rxr++, rxconf--)
2188 ixgbe_dma_free(adapter, &rxr->rxdma);