dev/flash/mx25l.c

156 	struct spi_command cmd;
159 	memset(&cmd, 0, sizeof(cmd));
163 		cmd.tx_cmd = txBuf;
164 		cmd.rx_cmd = rxBuf;
165 		cmd.rx_cmd_sz = 2;
166 		cmd.tx_cmd_sz = 2;
167 		err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
177 	struct spi_command cmd;
182 	memset(&cmd, 0, sizeof(cmd));
187 	cmd.tx_cmd = &txBuf;
188 	cmd.rx_cmd = &rxBuf;
193 	cmd.tx_cmd_sz = 4;
194 	cmd.rx_cmd_sz = 4;
195 	err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
218 	struct spi_command cmd;
221 	memset(&cmd, 0, sizeof(cmd));
226 	cmd.tx_cmd = txBuf;
227 	cmd.rx_cmd = rxBuf;
228 	cmd.rx_cmd_sz = 1;
229 	cmd.tx_cmd_sz = 1;
230 	err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
238 	struct spi_command cmd;
244 	memset(&cmd, 0, sizeof(cmd));
248 	cmd.tx_cmd = txBuf;
249 	cmd.rx_cmd = rxBuf;
259 		cmd.rx_cmd_sz = 5;
260 		cmd.tx_cmd_sz = 5;
266 		cmd.rx_cmd_sz = 4;
267 		cmd.tx_cmd_sz = 4;
272 	if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) != 0)
282 	struct spi_command cmd;
287 		cmd.tx_cmd_sz = 5;
288 		cmd.rx_cmd_sz = 5;
290 		cmd.tx_cmd_sz = 4;
291 		cmd.rx_cmd_sz = 4;
326 		cmd.tx_cmd = txBuf;
327 		cmd.rx_cmd = rxBuf;
328 		cmd.tx_data = data;
329 		cmd.rx_data = sc->sc_dummybuf;
330 		cmd.tx_data_sz = (uint32_t)bytes_to_write;
331 		cmd.rx_data_sz = (uint32_t)bytes_to_write;
342 		err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
361 	struct spi_command cmd;
375 		cmd.tx_cmd_sz = 6;
376 		cmd.rx_cmd_sz = 6;
385 		cmd.tx_cmd_sz = 5;
386 		cmd.rx_cmd_sz = 5;
395 	cmd.tx_cmd = txBuf;
396 	cmd.rx_cmd = rxBuf;
397 	cmd.tx_data = data;
398 	cmd.rx_data = data;
399 	cmd.tx_data_sz = count;
400 	cmd.rx_data_sz = count;
402 	err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd);
410 	struct spi_command cmd;
413 	memset(&cmd, 0, sizeof(cmd));
417 	cmd.tx_cmd_sz = cmd.rx_cmd_sz = 1;
419 	cmd.tx_cmd = txBuf;
420 	cmd.rx_cmd = rxBuf;
424 	if ((err = SPIBUS_TRANSFER(sc->sc_parent, sc->sc_dev, &cmd)) == 0)
583 mx25l_ioctl(struct disk *dp, u_long cmd, void *data, int fflag,