etherswitch/arswitch/arswitch_reg.c

65 arswitch_split_setpage(device_t dev, uint32_t addr, uint16_t *phy,
72 	*phy = (addr >> 6) & 0x7;
90 	uint16_t phy, reg;
92 	arswitch_split_setpage(dev, addr, &phy, &reg);
93 	return (MDIO_READREG(device_get_parent(dev), 0x10 | phy, reg));
102 	uint16_t phy, reg;
104 	arswitch_split_setpage(dev, addr, &phy, &reg);
105 	return (MDIO_WRITEREG(device_get_parent(dev), 0x10 | phy, reg, data));
118 arswitch_writedbg(device_t dev, int phy, uint16_t dbg_addr,
121 	(void) MDIO_WRITEREG(device_get_parent(dev), phy,
123 	(void) MDIO_WRITEREG(device_get_parent(dev), phy,
128 arswitch_writemmd(device_t dev, int phy, uint16_t dbg_addr,
131 	(void) MDIO_WRITEREG(device_get_parent(dev), phy,
133 	(void) MDIO_WRITEREG(device_get_parent(dev), phy,
138 arswitch_reg_read32(device_t dev, int phy, int reg)
141 	lo = MDIO_READREG(device_get_parent(dev), phy, reg);
142 	hi = MDIO_READREG(device_get_parent(dev), phy, reg + 1);
148 arswitch_reg_write32(device_t dev, int phy, int reg, uint32_t value)
160 		    phy, reg, lo);
162 		    phy, reg + 1, hi);
165 		    phy, reg + 1, hi);
167 		    phy, reg, lo);
176 	uint16_t phy, reg;
178 	arswitch_split_setpage(dev, addr, &phy, &reg);
179 	return arswitch_reg_read32(dev, 0x10 | phy, reg);
186 	uint16_t phy, reg;
190 	arswitch_split_setpage(dev, addr, &phy, &reg);
191 	return (arswitch_reg_write32(dev, 0x10 | phy, reg, value));
233 	uint16_t phy, reg;
235 	arswitch_split_setpage(dev, addr, &phy, &reg);
237 	value = arswitch_reg_read32(dev, 0x10 | phy, reg);
240 	return (arswitch_reg_write32(dev, 0x10 | phy, reg, value));
247 	uint16_t phy, reg;
249 	arswitch_split_setpage(dev, addr, &phy, &reg);
253 		v = arswitch_reg_read32(dev, 0x10 | phy, reg);