dev/et/if_et.c

225 	uint32_t pmcfg;
311 	pmcfg = ET_PM_SYSCLK_GATE | ET_PM_TXCLK_GATE | ET_PM_RXCLK_GATE;
313 		pmcfg |= EM_PM_GIGEPHY_ENB;
314 	CSR_WRITE_4(sc, ET_PM, pmcfg);
2714 	uint32_t pmcfg;
2721 	pmcfg = CSR_READ_4(sc, ET_PM);
2722 	pmcfg &= ~(EM_PM_GIGEPHY_ENB | ET_PM_SYSCLK_GATE | ET_PM_TXCLK_GATE |
2724 	pmcfg |= ET_PM_PHY_SW_COMA;
2725 	CSR_WRITE_4(sc, ET_PM, pmcfg);
2734 	uint32_t pmcfg;
2739 	pmcfg = ET_PM_SYSCLK_GATE | ET_PM_TXCLK_GATE | ET_PM_RXCLK_GATE;
2741 		pmcfg |= EM_PM_GIGEPHY_ENB;
2742 	CSR_WRITE_4(sc, ET_PM, pmcfg);