Lines Matching refs:hw
532 struct e1000_hw *hw;
544 hw = &adapter->hw;
581 if ((hw->mac.type == e1000_ich8lan) ||
582 (hw->mac.type == e1000_ich9lan) ||
583 (hw->mac.type == e1000_ich10lan) ||
584 (hw->mac.type == e1000_pchlan) ||
585 (hw->mac.type == e1000_pch2lan) ||
586 (hw->mac.type == e1000_pch_lpt)) {
596 hw->flash_address = (u8 *)adapter->flash;
608 else if (hw->mac.type >= e1000_pch_spt) {
617 error = e1000_setup_init_funcs(hw, TRUE);
630 e1000_get_bus_info(hw);
635 E1000_REGISTER(hw, E1000_RDTR), em_rx_int_delay_dflt);
638 E1000_REGISTER(hw, E1000_TIDV), em_tx_int_delay_dflt);
642 E1000_REGISTER(hw, E1000_RADV),
647 E1000_REGISTER(hw, E1000_TADV),
652 E1000_REGISTER(hw, E1000_ITR),
681 hw->mac.autoneg = DO_AUTO_NEG;
682 hw->phy.autoneg_wait_to_complete = FALSE;
683 hw->phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
686 if (hw->phy.media_type == e1000_media_type_copper) {
687 hw->phy.mdix = AUTO_ALL_MODES;
688 hw->phy.disable_polarity_correction = FALSE;
689 hw->phy.ms_type = EM_MASTER_SLAVE;
696 adapter->hw.mac.max_frame_size =
703 hw->mac.report_tx_early = 1;
723 if (e1000_check_reset_block(hw))
728 hw->dev_spec.ich8lan.eee_disable = eee_setting;
740 e1000_reset_hw(hw);
744 if (e1000_validate_nvm_checksum(hw) < 0) {
750 if (e1000_validate_nvm_checksum(hw) < 0) {
759 if (e1000_read_mac_addr(hw) < 0) {
766 if (!em_is_valid_ether_addr(hw->mac.addr)) {
773 e1000_disable_ulp_lpt_lp(hw, TRUE);
799 hw->mac.get_link_status = 1;
879 e1000_phy_hw_reset(&adapter->hw);
949 if (adapter->hw.mac.type == e1000_pch2lan)
950 e1000_resume_workarounds_pchlan(&adapter->hw);
1203 switch (adapter->hw.mac.type) {
1235 adapter->hw.mac.max_frame_size =
1278 if (e1000_check_reset_block(&adapter->hw)) {
1365 * by the driver as a hw/sw initialization routine to get to a
1385 bcopy(if_getlladdr(adapter->ifp), adapter->hw.mac.addr,
1389 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
1397 if (adapter->hw.mac.type == e1000_82571) {
1398 e1000_set_laa_state_82571(&adapter->hw, TRUE);
1399 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr,
1408 E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
1430 if (adapter->hw.mac.max_frame_size <= 2048)
1450 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1452 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1456 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
1458 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
1468 e1000_clear_hw_cntrs_base_generic(&adapter->hw);
1471 if (adapter->hw.mac.type == e1000_82574) {
1473 tmp = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
1475 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, tmp);
1477 E1000_WRITE_REG(&adapter->hw, E1000_IVAR, adapter->ivars);
1529 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1532 adapter->hw.mac.get_link_status = 1;
1572 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1586 if (adapter->hw.mac.type >= e1000_82571 &&
1595 adapter->hw.mac.get_link_status = 1;
1661 E1000_WRITE_REG(&adapter->hw, E1000_IMS, txr->ims);
1687 E1000_WRITE_REG(&adapter->hw, E1000_IMS, rxr->ims);
1704 reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
1710 adapter->hw.mac.get_link_status = 1;
1713 E1000_WRITE_REG(&adapter->hw, E1000_IMS,
1722 E1000_WRITE_REG(&adapter->hw,
1740 E1000_WRITE_REG(&adapter->hw, E1000_IMS, rxr->ims);
1760 E1000_WRITE_REG(&adapter->hw, E1000_IMS, txr->ims);
1768 struct e1000_hw *hw = &adapter->hw;
1779 if (hw->mac.type == e1000_82574 && adapter->msix_mem != NULL)
1780 E1000_WRITE_REG(hw, E1000_IMS, EM_MSIX_LINK | E1000_IMS_LSC);
1827 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) ||
1828 (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) {
1872 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1873 adapter->hw.phy.autoneg_advertised = AUTONEG_ADV_DEFAULT;
1878 adapter->hw.mac.autoneg = DO_AUTO_NEG;
1879 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
1882 adapter->hw.mac.autoneg = FALSE;
1883 adapter->hw.phy.autoneg_advertised = 0;
1885 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_FULL;
1887 adapter->hw.mac.forced_speed_duplex = ADVERTISE_100_HALF;
1890 adapter->hw.mac.autoneg = FALSE;
1891 adapter->hw.phy.autoneg_advertised = 0;
1893 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_FULL;
1895 adapter->hw.mac.forced_speed_duplex = ADVERTISE_10_HALF;
2221 E1000_WRITE_REG(&adapter->hw, E1000_TDT(txr->me), i);
2232 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2239 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2243 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2254 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2264 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2288 if (adapter->hw.mac.type == e1000_82542 &&
2289 adapter->hw.revision_id == E1000_REVISION_2) {
2290 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2291 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2292 e1000_pci_clear_mwi(&adapter->hw);
2294 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2301 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2303 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2305 e1000_update_mc_addr_list(&adapter->hw, mta, mcnt);
2307 if (adapter->hw.mac.type == e1000_82542 &&
2308 adapter->hw.revision_id == E1000_REVISION_2) {
2309 reg_rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
2311 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, reg_rctl);
2313 if (adapter->hw.bus.pci_cmd_word & CMD_MEM_WRT_INVALIDATE)
2314 e1000_pci_set_mwi(&adapter->hw);
2341 if ((adapter->hw.mac.type == e1000_82571) &&
2342 e1000_get_laa_state_82571(&adapter->hw))
2343 e1000_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2371 E1000_WRITE_REG(&adapter->hw, E1000_ICS, trigger);
2388 struct e1000_hw *hw = &adapter->hw;
2395 switch (hw->phy.media_type) {
2397 if (hw->mac.get_link_status) {
2398 if (hw->mac.type == e1000_pch_spt)
2401 e1000_check_for_link(hw);
2402 link_check = !hw->mac.get_link_status;
2404 e1000_cfg_on_link_up(hw);
2409 e1000_check_for_link(hw);
2410 link_check = (E1000_READ_REG(hw, E1000_STATUS) &
2414 e1000_check_for_link(hw);
2415 link_check = adapter->hw.mac.serdes_has_link;
2424 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
2441 ((hw->mac.type == e1000_82571) ||
2442 (hw->mac.type == e1000_82572))) {
2444 tarc0 = E1000_READ_REG(hw, E1000_TARC(0));
2446 E1000_WRITE_REG(hw, E1000_TARC(0), tarc0);
2505 if (adapter->hw.mac.type == e1000_pch_spt)
2508 e1000_reset_hw(&adapter->hw);
2509 E1000_WRITE_REG(&adapter->hw, E1000_WUC, 0);
2511 e1000_led_off(&adapter->hw);
2512 e1000_cleanup_led(&adapter->hw);
2528 adapter->hw.bus.pci_cmd_word = pci_read_config(dev, PCIR_COMMAND, 2);
2531 adapter->hw.vendor_id = pci_get_vendor(dev);
2532 adapter->hw.device_id = pci_get_device(dev);
2533 adapter->hw.revision_id = pci_read_config(dev, PCIR_REVID, 1);
2534 adapter->hw.subsystem_vendor_id =
2536 adapter->hw.subsystem_device_id =
2540 if (e1000_set_mac_type(&adapter->hw)) {
2563 adapter->hw.hw_addr = (u8 *)&adapter->osdep.mem_bus_space_handle;
2565 adapter->hw.back = &adapter->osdep;
2583 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
2643 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
2852 if ((adapter->hw.mac.type == e1000_82574) &&
2941 struct e1000_hw *hw = &adapter->hw;
2947 tctl = E1000_READ_REG(hw, E1000_TCTL);
2948 E1000_WRITE_REG(hw, E1000_TCTL, tctl | E1000_TCTL_EN);
2962 E1000_WRITE_REG(hw, E1000_TDT(0), txr->next_avail_desc);
2975 struct e1000_hw *hw = &adapter->hw;
2978 rctl = E1000_READ_REG(hw, E1000_RCTL);
2979 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
2980 E1000_WRITE_FLUSH(hw);
2983 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0));
2991 E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl);
2994 E1000_WRITE_REG(hw, E1000_RCTL, rctl | E1000_RCTL_EN);
2995 E1000_WRITE_FLUSH(hw);
2997 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
3013 struct e1000_hw *hw = &adapter->hw;
3019 fext_nvm11 = E1000_READ_REG(hw, E1000_FEXTNVM11);
3021 E1000_WRITE_REG(hw, E1000_FEXTNVM11, fext_nvm11);
3024 tdlen = E1000_READ_REG(hw, E1000_TDLEN(0));
3048 struct e1000_hw *hw = &adapter->hw;
3055 if (!em_smart_pwr_down && (hw->mac.type == e1000_82571 ||
3056 hw->mac.type == e1000_82572)) {
3060 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, &phy_tmp);
3062 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT, phy_tmp);
3070 switch (hw->mac.type) {
3090 if (adapter->hw.mac.max_frame_size > 4096)
3103 if (adapter->hw.mac.max_frame_size > 8192)
3108 E1000_WRITE_REG(&adapter->hw, E1000_PBA, pba);
3124 rx_buffer_size = ((E1000_READ_REG(hw, E1000_PBA) & 0xffff) << 10 );
3125 hw->fc.high_water = rx_buffer_size -
3126 roundup2(adapter->hw.mac.max_frame_size, 1024);
3127 hw->fc.low_water = hw->fc.high_water - 1500;
3130 hw->fc.requested_mode = adapter->fc;
3132 hw->fc.requested_mode = e1000_fc_full;
3134 if (hw->mac.type == e1000_80003es2lan)
3135 hw->fc.pause_time = 0xFFFF;
3137 hw->fc.pause_time = EM_FC_PAUSE_TIME;
3139 hw->fc.send_xon = TRUE;
3142 switch (hw->mac.type) {
3145 hw->fc.requested_mode = e1000_fc_rx_pause;
3146 hw->fc.pause_time = 0xFFFF; /* override */
3148 hw->fc.high_water = 0x3500;
3149 hw->fc.low_water = 0x1500;
3151 hw->fc.high_water = 0x5000;
3152 hw->fc.low_water = 0x3000;
3154 hw->fc.refresh_time = 0x1000;
3160 hw->fc.high_water = 0x5C20;
3161 hw->fc.low_water = 0x5048;
3162 hw->fc.pause_time = 0x0650;
3163 hw->fc.refresh_time = 0x0400;
3166 E1000_WRITE_REG(hw, E1000_PBA, 12);
3168 E1000_WRITE_REG(hw, E1000_PBA, 26);
3173 hw->fc.high_water = 0x2800;
3174 hw->fc.low_water = hw->fc.high_water - 8;
3179 if (hw->mac.type == e1000_80003es2lan)
3180 hw->fc.pause_time = 0xFFFF;
3185 if (hw->mac.type == e1000_pch_spt)
3189 e1000_reset_hw(hw);
3190 E1000_WRITE_REG(hw, E1000_WUC, 0);
3193 if (e1000_init_hw(hw) < 0) {
3198 E1000_WRITE_REG(hw, E1000_VET, ETHERTYPE_VLAN);
3199 e1000_get_phy_info(hw);
3200 e1000_check_for_link(hw);
3245 ether_ifattach(ifp, adapter->hw.mac.addr);
3303 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) ||
3304 (adapter->hw.phy.media_type == e1000_media_type_internal_serdes)) {
3318 if (adapter->hw.phy.type != e1000_phy_ife) {
3702 struct e1000_hw *hw = &adapter->hw;
3710 E1000_WRITE_REG(hw, E1000_TDLEN(i),
3712 E1000_WRITE_REG(hw, E1000_TDBAH(i),
3714 E1000_WRITE_REG(hw, E1000_TDBAL(i),
3717 E1000_WRITE_REG(hw, E1000_TDT(i), 0);
3718 E1000_WRITE_REG(hw, E1000_TDH(i), 0);
3721 E1000_READ_REG(&adapter->hw, E1000_TDBAL(i)),
3722 E1000_READ_REG(&adapter->hw, E1000_TDLEN(i)));
3733 E1000_WRITE_REG(hw, E1000_TXDCTL(i), txdctl);
3737 switch (adapter->hw.mac.type) {
3744 if ((adapter->hw.phy.media_type == e1000_media_type_fiber) ||
3745 (adapter->hw.phy.media_type ==
3754 E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
3755 E1000_WRITE_REG(&adapter->hw, E1000_TIDV, adapter->tx_int_delay.value);
3757 if(adapter->hw.mac.type >= e1000_82540)
3758 E1000_WRITE_REG(&adapter->hw, E1000_TADV,
3761 if ((adapter->hw.mac.type == e1000_82571) ||
3762 (adapter->hw.mac.type == e1000_82572)) {
3763 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
3765 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
3766 } else if (adapter->hw.mac.type == e1000_80003es2lan) {
3768 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
3770 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
3771 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(1));
3773 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
3774 } else if (adapter->hw.mac.type == e1000_82574) {
3775 tarc = E1000_READ_REG(&adapter->hw, E1000_TARC(0));
3779 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
3780 E1000_WRITE_REG(&adapter->hw, E1000_TARC(1), tarc);
3782 E1000_WRITE_REG(&adapter->hw, E1000_TARC(0), tarc);
3790 tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
3795 if (adapter->hw.mac.type >= e1000_82571)
3799 E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
3802 if (hw->mac.type == e1000_pch_spt) {
3804 reg = E1000_READ_REG(hw, E1000_IOSFPC);
3806 E1000_WRITE_REG(hw, E1000_IOSFPC, reg);
3808 reg = E1000_READ_REG(hw, E1000_TARC(0));
3811 E1000_WRITE_REG(hw, E1000_TARC(0), reg);
4325 E1000_WRITE_REG(&adapter->hw,
4600 struct e1000_hw *hw = &adapter->hw;
4609 rctl = E1000_READ_REG(hw, E1000_RCTL);
4611 if ((hw->mac.type != e1000_82574) && (hw->mac.type != e1000_82583))
4612 E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
4618 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
4633 E1000_WRITE_REG(&adapter->hw, E1000_RADV,
4636 E1000_WRITE_REG(&adapter->hw, E1000_RDTR,
4642 E1000_WRITE_REG(hw, E1000_ITR, DEFAULT_ITR);
4645 rfctl = E1000_READ_REG(hw, E1000_RFCTL);
4651 if (hw->mac.type == e1000_82574) {
4653 E1000_WRITE_REG(hw, E1000_EITR_82574(i),
4658 E1000_WRITE_REG(hw, E1000_RFCTL, rfctl);
4660 rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
4672 E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
4689 E1000_WRITE_REG(hw,E1000_RSSRK(i), rssrk);
4704 E1000_WRITE_REG(hw, E1000_RETA(i), reta);
4707 E1000_WRITE_REG(hw, E1000_MRQC, E1000_MRQC_RSS_ENABLE_2Q |
4722 if (hw->mac.type == e1000_82573)
4723 E1000_WRITE_REG(hw, E1000_RDTR, 0x20);
4730 E1000_WRITE_REG(hw, E1000_RDLEN(i),
4732 E1000_WRITE_REG(hw, E1000_RDBAH(i), (u32)(bus_addr >> 32));
4733 E1000_WRITE_REG(hw, E1000_RDBAL(i), (u32)bus_addr);
4735 E1000_WRITE_REG(hw, E1000_RDH(i), 0);
4746 E1000_WRITE_REG(hw, E1000_RDT(i), rdt);
4756 if (((adapter->hw.mac.type == e1000_ich9lan) ||
4757 (adapter->hw.mac.type == e1000_pch2lan) ||
4758 (adapter->hw.mac.type == e1000_ich10lan)) &&
4760 u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(0));
4761 E1000_WRITE_REG(hw, E1000_RXDCTL(0), rxdctl | 3);
4762 } else if (adapter->hw.mac.type == e1000_82574) {
4764 u32 rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(i));
4770 E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl);
4774 if (adapter->hw.mac.type >= e1000_pch2lan) {
4776 e1000_lv_jumbo_workaround_ich8lan(hw, TRUE);
4778 e1000_lv_jumbo_workaround_ich8lan(hw, FALSE);
4794 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4890 if (adapter->hw.mac.max_frame_size >
5121 struct e1000_hw *hw = &adapter->hw;
5139 E1000_WRITE_REG_ARRAY(hw, E1000_VFTA,
5142 reg = E1000_READ_REG(hw, E1000_CTRL);
5144 E1000_WRITE_REG(hw, E1000_CTRL, reg);
5147 reg = E1000_READ_REG(hw, E1000_RCTL);
5150 E1000_WRITE_REG(hw, E1000_RCTL, reg);
5156 struct e1000_hw *hw = &adapter->hw;
5159 if (hw->mac.type == e1000_82574) {
5160 E1000_WRITE_REG(hw, EM_EIAC, EM_MSIX_MASK);
5163 E1000_WRITE_REG(hw, E1000_IMS, ims_mask);
5169 struct e1000_hw *hw = &adapter->hw;
5171 if (hw->mac.type == e1000_82574)
5172 E1000_WRITE_REG(hw, EM_EIAC, 0);
5173 E1000_WRITE_REG(&adapter->hw, E1000_IMC, 0xffffffff);
5187 int manc2h = E1000_READ_REG(&adapter->hw, E1000_MANC2H);
5188 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
5199 E1000_WRITE_REG(&adapter->hw, E1000_MANC2H, manc2h);
5200 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
5212 int manc = E1000_READ_REG(&adapter->hw, E1000_MANC);
5218 E1000_WRITE_REG(&adapter->hw, E1000_MANC, manc);
5233 if (adapter->hw.mac.type == e1000_82573) {
5234 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
5235 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
5240 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
5241 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
5260 if (adapter->hw.mac.type == e1000_82573) {
5261 swsm = E1000_READ_REG(&adapter->hw, E1000_SWSM);
5262 E1000_WRITE_REG(&adapter->hw, E1000_SWSM,
5267 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
5268 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT,
5296 adapter->has_manage = e1000_enable_mng_pass_thru(&adapter->hw);
5299 switch (adapter->hw.mac.type) {
5307 if (adapter->hw.bus.func == 1) {
5308 e1000_read_nvm(&adapter->hw,
5312 e1000_read_nvm(&adapter->hw,
5325 eeprom_data = E1000_READ_REG(&adapter->hw, E1000_WUC);
5328 e1000_read_nvm(&adapter->hw,
5344 if (E1000_READ_REG(&adapter->hw, E1000_STATUS) &
5388 rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
5390 E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl);
5397 ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
5399 E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
5402 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5403 adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
5404 ctrl_ext = E1000_READ_REG(&adapter->hw, E1000_CTRL_EXT);
5406 E1000_WRITE_REG(&adapter->hw, E1000_CTRL_EXT, ctrl_ext);
5409 if ((adapter->hw.mac.type == e1000_ich8lan) ||
5410 (adapter->hw.mac.type == e1000_pchlan) ||
5411 (adapter->hw.mac.type == e1000_ich9lan) ||
5412 (adapter->hw.mac.type == e1000_ich10lan))
5413 e1000_suspend_workarounds_ich8lan(&adapter->hw);
5415 if ((adapter->hw.mac.type == e1000_pchlan) ||
5416 (adapter->hw.mac.type == e1000_pch2lan) ||
5417 (adapter->hw.mac.type == e1000_pch_lpt) ||
5418 (adapter->hw.mac.type == e1000_pch_spt) ||
5419 (adapter->hw.mac.type == e1000_pch_cnp)) {
5425 E1000_WRITE_REG(&adapter->hw, E1000_WUC, E1000_WUC_PME_EN);
5426 E1000_WRITE_REG(&adapter->hw, E1000_WUFC, adapter->wol);
5429 if (adapter->hw.phy.type == e1000_phy_igp_3)
5430 e1000_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5449 struct e1000_hw *hw = &adapter->hw;
5454 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5457 for (int i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5458 mreg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5459 e1000_write_phy_reg(hw, BM_MTA(i), (u16)(mreg & 0xFFFF));
5460 e1000_write_phy_reg(hw, BM_MTA(i) + 1,
5465 e1000_read_phy_reg(&adapter->hw, BM_RCTL, &preg);
5466 mreg = E1000_READ_REG(hw, E1000_RCTL);
5479 mreg = E1000_READ_REG(hw, E1000_CTRL);
5482 e1000_write_phy_reg(&adapter->hw, BM_RCTL, preg);
5485 E1000_WRITE_REG(hw, E1000_WUC,
5487 E1000_WRITE_REG(hw, E1000_WUFC, adapter->wol);
5490 e1000_write_phy_reg(&adapter->hw, BM_WUFC, adapter->wol);
5491 e1000_write_phy_reg(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5494 ret = hw->phy.ops.acquire(hw);
5499 e1000_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
5501 ret = e1000_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &preg);
5507 ret = e1000_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, preg);
5511 hw->phy.ops.release(hw);
5523 e1000_setup_led(&adapter->hw);
5524 e1000_led_on(&adapter->hw);
5526 e1000_led_off(&adapter->hw);
5527 e1000_cleanup_led(&adapter->hw);
5542 switch (adapter->hw.mac.type) {
5572 if(adapter->hw.phy.media_type == e1000_media_type_copper ||
5573 (E1000_READ_REG(&adapter->hw, E1000_STATUS) & E1000_STATUS_LU)) {
5574 adapter->stats.symerrs += E1000_READ_REG(&adapter->hw, E1000_SYMERRS);
5575 adapter->stats.sec += E1000_READ_REG(&adapter->hw, E1000_SEC);
5577 adapter->stats.crcerrs += E1000_READ_REG(&adapter->hw, E1000_CRCERRS);
5578 adapter->stats.mpc += E1000_READ_REG(&adapter->hw, E1000_MPC);
5579 adapter->stats.scc += E1000_READ_REG(&adapter->hw, E1000_SCC);
5580 adapter->stats.ecol += E1000_READ_REG(&adapter->hw, E1000_ECOL);
5582 adapter->stats.mcc += E1000_READ_REG(&adapter->hw, E1000_MCC);
5583 adapter->stats.latecol += E1000_READ_REG(&adapter->hw, E1000_LATECOL);
5584 adapter->stats.colc += E1000_READ_REG(&adapter->hw, E1000_COLC);
5585 adapter->stats.dc += E1000_READ_REG(&adapter->hw, E1000_DC);
5586 adapter->stats.rlec += E1000_READ_REG(&adapter->hw, E1000_RLEC);
5587 adapter->stats.xonrxc += E1000_READ_REG(&adapter->hw, E1000_XONRXC);
5588 adapter->stats.xontxc += E1000_READ_REG(&adapter->hw, E1000_XONTXC);
5589 adapter->stats.xoffrxc += E1000_READ_REG(&adapter->hw, E1000_XOFFRXC);
5590 adapter->stats.xofftxc += E1000_READ_REG(&adapter->hw, E1000_XOFFTXC);
5591 adapter->stats.fcruc += E1000_READ_REG(&adapter->hw, E1000_FCRUC);
5592 adapter->stats.prc64 += E1000_READ_REG(&adapter->hw, E1000_PRC64);
5593 adapter->stats.prc127 += E1000_READ_REG(&adapter->hw, E1000_PRC127);
5594 adapter->stats.prc255 += E1000_READ_REG(&adapter->hw, E1000_PRC255);
5595 adapter->stats.prc511 += E1000_READ_REG(&adapter->hw, E1000_PRC511);
5596 adapter->stats.prc1023 += E1000_READ_REG(&adapter->hw, E1000_PRC1023);
5597 adapter->stats.prc1522 += E1000_READ_REG(&adapter->hw, E1000_PRC1522);
5598 adapter->stats.gprc += E1000_READ_REG(&adapter->hw, E1000_GPRC);
5599 adapter->stats.bprc += E1000_READ_REG(&adapter->hw, E1000_BPRC);
5600 adapter->stats.mprc += E1000_READ_REG(&adapter->hw, E1000_MPRC);
5601 adapter->stats.gptc += E1000_READ_REG(&adapter->hw, E1000_GPTC);
5606 adapter->stats.gorc += E1000_READ_REG(&adapter->hw, E1000_GORCL) +
5607 ((u64)E1000_READ_REG(&adapter->hw, E1000_GORCH) << 32);
5608 adapter->stats.gotc += E1000_READ_REG(&adapter->hw, E1000_GOTCL) +
5609 ((u64)E1000_READ_REG(&adapter->hw, E1000_GOTCH) << 32);
5611 adapter->stats.rnbc += E1000_READ_REG(&adapter->hw, E1000_RNBC);
5612 adapter->stats.ruc += E1000_READ_REG(&adapter->hw, E1000_RUC);
5613 adapter->stats.rfc += E1000_READ_REG(&adapter->hw, E1000_RFC);
5614 adapter->stats.roc += E1000_READ_REG(&adapter->hw, E1000_ROC);
5615 adapter->stats.rjc += E1000_READ_REG(&adapter->hw, E1000_RJC);
5617 adapter->stats.tor += E1000_READ_REG(&adapter->hw, E1000_TORH);
5618 adapter->stats.tot += E1000_READ_REG(&adapter->hw, E1000_TOTH);
5620 adapter->stats.tpr += E1000_READ_REG(&adapter->hw, E1000_TPR);
5621 adapter->stats.tpt += E1000_READ_REG(&adapter->hw, E1000_TPT);
5622 adapter->stats.ptc64 += E1000_READ_REG(&adapter->hw, E1000_PTC64);
5623 adapter->stats.ptc127 += E1000_READ_REG(&adapter->hw, E1000_PTC127);
5624 adapter->stats.ptc255 += E1000_READ_REG(&adapter->hw, E1000_PTC255);
5625 adapter->stats.ptc511 += E1000_READ_REG(&adapter->hw, E1000_PTC511);
5626 adapter->stats.ptc1023 += E1000_READ_REG(&adapter->hw, E1000_PTC1023);
5627 adapter->stats.ptc1522 += E1000_READ_REG(&adapter->hw, E1000_PTC1522);
5628 adapter->stats.mptc += E1000_READ_REG(&adapter->hw, E1000_MPTC);
5629 adapter->stats.bptc += E1000_READ_REG(&adapter->hw, E1000_BPTC);
5633 adapter->stats.iac += E1000_READ_REG(&adapter->hw, E1000_IAC);
5634 adapter->stats.icrxptc += E1000_READ_REG(&adapter->hw, E1000_ICRXPTC);
5635 adapter->stats.icrxatc += E1000_READ_REG(&adapter->hw, E1000_ICRXATC);
5636 adapter->stats.ictxptc += E1000_READ_REG(&adapter->hw, E1000_ICTXPTC);
5637 adapter->stats.ictxatc += E1000_READ_REG(&adapter->hw, E1000_ICTXATC);
5638 adapter->stats.ictxqec += E1000_READ_REG(&adapter->hw, E1000_ICTXQEC);
5639 adapter->stats.ictxqmtc += E1000_READ_REG(&adapter->hw, E1000_ICTXQMTC);
5640 adapter->stats.icrxdmtc += E1000_READ_REG(&adapter->hw, E1000_ICRXDMTC);
5641 adapter->stats.icrxoc += E1000_READ_REG(&adapter->hw, E1000_ICRXOC);
5643 if (adapter->hw.mac.type >= e1000_82543) {
5645 E1000_READ_REG(&adapter->hw, E1000_ALGNERRC);
5647 E1000_READ_REG(&adapter->hw, E1000_RXERRC);
5649 E1000_READ_REG(&adapter->hw, E1000_TNCRS);
5651 E1000_READ_REG(&adapter->hw, E1000_CEXTERR);
5653 E1000_READ_REG(&adapter->hw, E1000_TSCTC);
5655 E1000_READ_REG(&adapter->hw, E1000_TSCTFC);
5690 val = E1000_READ_REG(&adapter->hw, oidp->oid_arg2);
5745 CTLFLAG_RD, &adapter->hw.fc.high_water, 0,
5748 CTLFLAG_RD, &adapter->hw.fc.low_water, 0,
6033 e1000_read_nvm(&adapter->hw, i, 1, &eeprom_data);
6062 regval = E1000_READ_OFFSET(&adapter->hw, info->offset);
6077 E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval);
6135 adapter->hw.fc.requested_mode = input;
6143 adapter->hw.fc.current_mode = adapter->hw.fc.requested_mode;
6144 e1000_force_mac_fc(&adapter->hw);
6159 value = adapter->hw.dev_spec.ich8lan.eee_disable;
6164 adapter->hw.dev_spec.ich8lan.eee_disable = (value != 0);
6214 device_printf(dev, "hw tdh = %d, hw tdt = %d\n",
6215 E1000_READ_REG(&adapter->hw, E1000_TDH(i)),
6216 E1000_READ_REG(&adapter->hw, E1000_TDT(i)));
6223 device_printf(dev, "hw rdh = %d, hw rdt = %d\n",
6224 E1000_READ_REG(&adapter->hw, E1000_RDH(i)),
6225 E1000_READ_REG(&adapter->hw, E1000_RDT(i)));
6242 struct e1000_hw *hw = &adapter->hw;
6246 e1000_read_nvm(hw, EM_NVM_PCIE_CTRL, 1, &edata);
6253 e1000_write_nvm(hw, EM_NVM_PCIE_CTRL, 1, &edata);
6254 e1000_update_nvm_checksum(hw);