dev/e1000/e1000_i210.c

38 static s32 e1000_acquire_nvm_i210(struct e1000_hw *hw);
39 static void e1000_release_nvm_i210(struct e1000_hw *hw);
40 static s32 e1000_get_hw_semaphore_i210(struct e1000_hw *hw);
41 static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
43 static s32 e1000_pool_flash_update_done_i210(struct e1000_hw *hw);
44 static s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data);
48  *  @hw: pointer to the HW structure
55 static s32 e1000_acquire_nvm_i210(struct e1000_hw *hw)
61 	ret_val = e1000_acquire_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);
68  *  @hw: pointer to the HW structure
73 static void e1000_release_nvm_i210(struct e1000_hw *hw)
77 	e1000_release_swfw_sync_i210(hw, E1000_SWFW_EEP_SM);
82  *  @hw: pointer to the HW structure
88 s32 e1000_acquire_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
99 		if (e1000_get_hw_semaphore_i210(hw)) {
104 		swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
112 		e1000_put_hw_semaphore_generic(hw);
124 	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
126 	e1000_put_hw_semaphore_generic(hw);
134  *  @hw: pointer to the HW structure
140 void e1000_release_swfw_sync_i210(struct e1000_hw *hw, u16 mask)
146 	while (e1000_get_hw_semaphore_i210(hw) != E1000_SUCCESS)
149 	swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
151 	E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
153 	e1000_put_hw_semaphore_generic(hw);
158  *  @hw: pointer to the HW structure
162 static s32 e1000_get_hw_semaphore_i210(struct e1000_hw *hw)
165 	s32 timeout = hw->nvm.word_size + 1;
172 		swsm = E1000_READ_REG(hw, E1000_SWSM);
184 		if (hw->dev_spec._82575.clear_semaphore_once) {
185 			hw->dev_spec._82575.clear_semaphore_once = FALSE;
186 			e1000_put_hw_semaphore_generic(hw);
188 				swsm = E1000_READ_REG(hw, E1000_SWSM);
205 		swsm = E1000_READ_REG(hw, E1000_SWSM);
206 		E1000_WRITE_REG(hw, E1000_SWSM, swsm | E1000_SWSM_SWESMBI);
209 		if (E1000_READ_REG(hw, E1000_SWSM) & E1000_SWSM_SWESMBI)
217 		e1000_put_hw_semaphore_generic(hw);
227  *  @hw: pointer to the HW structure
235 s32 e1000_read_nvm_srrd_i210(struct e1000_hw *hw, u16 offset, u16 words,
249 		if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
250 			status = e1000_read_nvm_eerd(hw, offset, count,
252 			hw->nvm.ops.release(hw);
266  *  @hw: pointer to the HW structure
280 s32 e1000_write_nvm_srwr_i210(struct e1000_hw *hw, u16 offset, u16 words,
294 		if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
295 			status = e1000_write_nvm_srwr(hw, offset, count,
297 			hw->nvm.ops.release(hw);
311  *  @hw: pointer to the HW structure
321 static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
324 	struct e1000_nvm_info *nvm = &hw->nvm;
347 		E1000_WRITE_REG(hw, E1000_SRWR, eewr);
351 			    E1000_READ_REG(hw, E1000_SRWR)) {
369  *  @hw: pointer to the HW structure
376 static s32 e1000_read_invm_word_i210(struct e1000_hw *hw, u8 address, u16 *data)
386 		invm_dword = E1000_READ_REG(hw, E1000_INVM_DATA_REG(i));
412  *  @hw: pointer to the HW structure
418 static s32 e1000_read_invm_i210(struct e1000_hw *hw, u16 offset,
428 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, &data[0]);
429 		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+1,
431 		ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+2,
437 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
444 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
451 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
458 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
465 		ret_val = e1000_read_invm_word_i210(hw, (u8)offset, data);
472 		*data = hw->subsystem_device_id;
475 		*data = hw->subsystem_vendor_id;
478 		*data = hw->device_id;
481 		*data = hw->vendor_id;
493  *  @hw: pointer to the HW structure
498 s32 e1000_validate_nvm_checksum_i210(struct e1000_hw *hw)
505 	if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
512 		read_op_ptr = hw->nvm.ops.read;
513 		hw->nvm.ops.read = e1000_read_nvm_eerd;
515 		status = e1000_validate_nvm_checksum_generic(hw);
518 		hw->nvm.ops.read = read_op_ptr;
520 		hw->nvm.ops.release(hw);
531  *  @hw: pointer to the HW structure
537 s32 e1000_update_nvm_checksum_i210(struct e1000_hw *hw)
550 	ret_val = e1000_read_nvm_eerd(hw, 0, 1, &nvm_data);
556 	if (hw->nvm.ops.acquire(hw) == E1000_SUCCESS) {
558 		 * Do not use hw->nvm.ops.write, hw->nvm.ops.read
564 			ret_val = e1000_read_nvm_eerd(hw, i, 1, &nvm_data);
566 				hw->nvm.ops.release(hw);
573 		ret_val = e1000_write_nvm_srwr(hw, NVM_CHECKSUM_REG, 1,
576 			hw->nvm.ops.release(hw);
581 		hw->nvm.ops.release(hw);
583 		ret_val = e1000_update_flash_i210(hw);
593  *  @hw: pointer to the HW structure
596 bool e1000_get_flash_presence_i210(struct e1000_hw *hw)
603 	eec = E1000_READ_REG(hw, E1000_EECD);
613  *  @hw: pointer to the HW structure
616 s32 e1000_update_flash_i210(struct e1000_hw *hw)
623 	ret_val = e1000_pool_flash_update_done_i210(hw);
629 	flup = E1000_READ_REG(hw, E1000_EECD) | E1000_EECD_FLUPD_I210;
630 	E1000_WRITE_REG(hw, E1000_EECD, flup);
632 	ret_val = e1000_pool_flash_update_done_i210(hw);
644  *  @hw: pointer to the HW structure
647 s32 e1000_pool_flash_update_done_i210(struct e1000_hw *hw)
655 		reg = E1000_READ_REG(hw, E1000_EECD);
668  *  @hw: pointer to the HW structure
672 static s32 e1000_init_nvm_params_i210(struct e1000_hw *hw)
675 	struct e1000_nvm_info *nvm = &hw->nvm;
679 	ret_val = e1000_init_nvm_params_82575(hw);
683 	if (e1000_get_flash_presence_i210(hw)) {
684 		hw->nvm.type = e1000_nvm_flash_hw;
690 		hw->nvm.type = e1000_nvm_invm;
701  *  @hw: pointer to the HW structure
705 void e1000_init_function_pointers_i210(struct e1000_hw *hw)
707 	e1000_init_function_pointers_82575(hw);
708 	hw->nvm.ops.init_params = e1000_init_nvm_params_i210;
715  *  @hw: pointer to the HW structure
721 static s32 e1000_valid_led_default_i210(struct e1000_hw *hw, u16 *data)
727 	ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
734 		switch (hw->phy.media_type) {
750  *  @hw: pointer to the HW structure
756 static s32 __e1000_access_xmdio_reg(struct e1000_hw *hw, u16 address,
763 	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr);
767 	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address);
771 	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA |
777 		ret_val = hw->phy.ops.read_reg(hw, E1000_MMDAAD, data);
779 		ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data);
784 	ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0);
793  *  @hw: pointer to the HW structure
798 s32 e1000_read_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 *data)
802 	return __e1000_access_xmdio_reg(hw, addr, dev_addr, data, TRUE);
807  *  @hw: pointer to the HW structure
812 s32 e1000_write_xmdio_reg(struct e1000_hw *hw, u16 addr, u8 dev_addr, u16 data)
816 	return __e1000_access_xmdio_reg(hw, addr, dev_addr, &data, FALSE);
821  * @hw: pointer to the HW structure
826 static s32 e1000_pll_workaround_i210(struct e1000_hw *hw)
834 	wuc = E1000_READ_REG(hw, E1000_WUC);
835 	mdicnfg = E1000_READ_REG(hw, E1000_MDICNFG);
837 	E1000_WRITE_REG(hw, E1000_MDICNFG, reg_val);
840 	ret_val = e1000_read_invm_word_i210(hw, E1000_INVM_AUTOLOAD,
847 		e1000_read_phy_reg_gs40g(hw, (E1000_PHY_PLL_FREQ_PAGE |
857 		ctrl = E1000_READ_REG(hw, E1000_CTRL);
858 		E1000_WRITE_REG(hw, E1000_CTRL, ctrl|E1000_CTRL_PHY_RST);
860 		ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
862 		E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
864 		E1000_WRITE_REG(hw, E1000_WUC, 0);
866 		E1000_WRITE_REG(hw, E1000_EEARBC_I210, reg_val);
868 		e1000_read_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
870 		e1000_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
873 		e1000_write_pci_cfg(hw, E1000_PCI_PMCSR, &pci_word);
875 		E1000_WRITE_REG(hw, E1000_EEARBC_I210, reg_val);
878 		E1000_WRITE_REG(hw, E1000_WUC, wuc);
881 	E1000_WRITE_REG(hw, E1000_MDICNFG, mdicnfg);
887  *  @hw: pointer to the HW structure
895 static s32 e1000_get_cfg_done_i210(struct e1000_hw *hw)
903 		if (E1000_READ_REG(hw, E1000_EEMNGCTL_I210) & mask)
915  *  e1000_init_hw_i210 - Init hw for I210/I211
916  *  @hw: pointer to the HW structure
918  *  Called to initialize hw for i210 hw family.
920 s32 e1000_init_hw_i210(struct e1000_hw *hw)
925 	if ((hw->mac.type >= e1000_i210) &&
926 	    !(e1000_get_flash_presence_i210(hw))) {
927 		ret_val = e1000_pll_workaround_i210(hw);
931 	hw->phy.ops.get_cfg_done = e1000_get_cfg_done_i210;
932 	ret_val = e1000_init_hw_82575(hw);