drm2/radeon/radeon_combios.c

506 	struct radeon_i2c_bus_rec i2c;
579 		i2c.mask_clk_reg = RADEON_GPIOPAD_MASK;
580 		i2c.mask_data_reg = RADEON_GPIOPAD_MASK;
581 		i2c.a_clk_reg = RADEON_GPIOPAD_A;
582 		i2c.a_data_reg = RADEON_GPIOPAD_A;
583 		i2c.en_clk_reg = RADEON_GPIOPAD_EN;
584 		i2c.en_data_reg = RADEON_GPIOPAD_EN;
585 		i2c.y_clk_reg = RADEON_GPIOPAD_Y;
586 		i2c.y_data_reg = RADEON_GPIOPAD_Y;
588 		i2c.mask_clk_reg = RADEON_MDGPIO_MASK;
589 		i2c.mask_data_reg = RADEON_MDGPIO_MASK;
590 		i2c.a_clk_reg = RADEON_MDGPIO_A;
591 		i2c.a_data_reg = RADEON_MDGPIO_A;
592 		i2c.en_clk_reg = RADEON_MDGPIO_EN;
593 		i2c.en_data_reg = RADEON_MDGPIO_EN;
594 		i2c.y_clk_reg = RADEON_MDGPIO_Y;
595 		i2c.y_data_reg = RADEON_MDGPIO_Y;
597 		i2c.mask_clk_reg = ddc_line;
598 		i2c.mask_data_reg = ddc_line;
599 		i2c.a_clk_reg = ddc_line;
600 		i2c.a_data_reg = ddc_line;
601 		i2c.en_clk_reg = ddc_line;
602 		i2c.en_data_reg = ddc_line;
603 		i2c.y_clk_reg = ddc_line;
604 		i2c.y_data_reg = ddc_line;
609 		i2c.mask_clk_mask = clk_mask;
610 		i2c.mask_data_mask = data_mask;
611 		i2c.a_clk_mask = clk_mask;
612 		i2c.a_data_mask = data_mask;
613 		i2c.en_clk_mask = clk_mask;
614 		i2c.en_data_mask = data_mask;
615 		i2c.y_clk_mask = clk_mask;
616 		i2c.y_data_mask = data_mask;
620 		i2c.mask_clk_mask = (0x20 << 8);
621 		i2c.mask_data_mask = 0x80;
622 		i2c.a_clk_mask = (0x20 << 8);
623 		i2c.a_data_mask = 0x80;
624 		i2c.en_clk_mask = (0x20 << 8);
625 		i2c.en_data_mask = 0x80;
626 		i2c.y_clk_mask = (0x20 << 8);
627 		i2c.y_data_mask = 0x80;
630 		i2c.mask_clk_mask = RADEON_GPIO_MASK_1;
631 		i2c.mask_data_mask = RADEON_GPIO_MASK_0;
632 		i2c.a_clk_mask = RADEON_GPIO_A_1;
633 		i2c.a_data_mask = RADEON_GPIO_A_0;
634 		i2c.en_clk_mask = RADEON_GPIO_EN_1;
635 		i2c.en_data_mask = RADEON_GPIO_EN_0;
636 		i2c.y_clk_mask = RADEON_GPIO_Y_1;
637 		i2c.y_data_mask = RADEON_GPIO_Y_0;
649 			i2c.hw_capable = true;
652 			i2c.hw_capable = false;
660 			i2c.hw_capable = true;
663 			i2c.hw_capable = false;
673 			i2c.hw_capable = true;
676 			i2c.hw_capable = false;
685 			i2c.hw_capable = true;
688 			i2c.hw_capable = false;
699 			i2c.hw_capable = true;
702 			/* hw i2c on RADEON_GPIO_MONID doesn't seem to work
705 			i2c.hw_capable = false;
708 			i2c.hw_capable = false;
713 		i2c.hw_capable = false;
716 	i2c.mm_i2c = false;
718 	i2c.i2c_id = ddc;
719 	i2c.hpd = RADEON_HPD_NONE;
722 		i2c.valid = true;
724 		i2c.valid = false;
726 	return i2c;
732 	struct radeon_i2c_bus_rec i2c;
737 	i2c.valid = false;
748 				i2c = combios_setup_i2c_bus(rdev, DDC_MONID,
754 	return i2c;
760 	struct radeon_i2c_bus_rec i2c;
774 	i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0);
775 	rdev->i2c_bus[0] = radeon_i2c_create(dev, &i2c, "DVI_DDC");
777 	i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0);
778 	rdev->i2c_bus[1] = radeon_i2c_create(dev, &i2c, "VGA_DDC");
780 	/* mm i2c */
781 	i2c.valid = true;
782 	i2c.hw_capable = true;
783 	i2c.mm_i2c = true;
784 	i2c.i2c_id = 0xa0;
785 	rdev->i2c_bus[2] = radeon_i2c_create(dev, &i2c, "MM_I2C");
789 		/* only 2 sw i2c pads */
794 		i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
795 		rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID");
798 		i2c = radeon_combios_get_i2c_info_from_table(rdev);
799 		if (i2c.valid)
800 			rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "GPIOPAD_MASK");
804 		i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0);
805 		rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID");
808 		i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0);
809 		rdev->i2c_bus[3] = radeon_i2c_create(dev, &i2c, "MONID");
811 		i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0);
812 		rdev->i2c_bus[4] = radeon_i2c_create(dev, &i2c, "CRT2_DDC");
1511 				/* MM i2c */
2767 				/* MM i2c */