Lines Matching refs:lobj
1268 tmp += (((u32)reloc->lobj.gpu_offset) >> 10);
1271 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
1273 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
1319 ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->lobj.gpu_offset);
1331 ib[idx+2] = radeon_get_ib_value(p, idx + 2) + ((u32)reloc->lobj.gpu_offset);
1345 ib[idx+1] = radeon_get_ib_value(p, idx + 1) + ((u32)reloc->lobj.gpu_offset);
1697 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
1710 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
1724 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
1726 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
1731 ib[idx] = tmp + ((u32)reloc->lobj.gpu_offset);
1733 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
1751 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
1769 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
1787 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
1805 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
1807 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
1875 ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset);
2035 ib[idx+1] = radeon_get_ib_value(p, idx+1) + ((u32)reloc->lobj.gpu_offset);
2049 ib[idx] = radeon_get_ib_value(p, idx) + ((u32)reloc->lobj.gpu_offset);