drm2/i915/i915_irq.c

533 	u32 iir, gt_iir, pm_iir;
541 		iir = I915_READ(VLV_IIR);
545 		if (gt_iir == 0 && pm_iir == 0 && iir == 0)
578 		if (iir & I915_DISPLAY_PORT_INTERRUPT) {
599 		I915_WRITE(VLV_IIR, iir);
690 	/* disable master interrupt before clearing iir  */
759 	/* disable master interrupt before clearing iir  */
2154 	u16 iir, new_iir;
2164 	iir = I915_READ16(IIR);
2165 	if (iir == 0)
2168 	while (iir & ~flip_mask) {
2169 		/* Can't rely on pipestat interrupt bit in iir as it might
2171 		 * It doesn't set the bit in iir again, but it still produces
2175 		if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
2195 		I915_WRITE16(IIR, iir & ~flip_mask);
2200 		if (iir & I915_USER_INTERRUPT)
2205 			if (iir & I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT) {
2214 			if (iir & I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT) {
2221 		iir = new_iir;
2329 	u32 iir, new_iir, pipe_stats[I915_MAX_PIPES];
2341 	iir = I915_READ(IIR);
2343 		bool irq_received = (iir & ~flip_mask) != 0;
2346 		/* Can't rely on pipestat interrupt bit in iir as it might
2348 		 * It doesn't set the bit in iir again, but it still produces
2352 		if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
2375 		    (iir & I915_DISPLAY_PORT_INTERRUPT)) {
2388 		I915_WRITE(IIR, iir & ~flip_mask);
2391 		if (iir & I915_USER_INTERRUPT)
2400 				if (iir & flip[plane]) {
2411 		if (blc_event || (iir & I915_ASLE_INTERRUPT))
2414 		/* With MSI, interrupts are only generated when iir
2416 		 * set while we were handling the existing iir bits, then
2429 		iir = new_iir;
2430 	} while (iir & ~flip_mask);
2563 	u32 iir, new_iir;
2570 	iir = I915_READ(IIR);
2575 		irq_received = iir != 0;
2577 		/* Can't rely on pipestat interrupt bit in iir as it might
2579 		 * It doesn't set the bit in iir again, but it still produces
2583 		if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
2607 		if (iir & I915_DISPLAY_PORT_INTERRUPT) {
2620 		I915_WRITE(IIR, iir);
2623 		if (iir & I915_USER_INTERRUPT)
2625 		if (iir & I915_BSD_USER_INTERRUPT)
2628 		if (iir & I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT)
2631 		if (iir & I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT)
2646 		if (blc_event || (iir & I915_ASLE_INTERRUPT))
2649 		/* With MSI, interrupts are only generated when iir
2651 		 * set while we were handling the existing iir bits, then
2664 		iir = new_iir;