Lines Matching refs:gart_info
120 void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
128 if (gart_info->bus_addr) {
130 max_pages = (gart_info->table_size / sizeof(u32));
141 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN)
142 gart_info->bus_addr = 0;
150 struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info;
161 pci_gart = (u64 *)gart_info->addr;
163 max_pages = (gart_info->table_size / sizeof(u64));
176 r600_page_table_cleanup(dev, gart_info);
275 RADEON_WRITE(R600_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, dev_priv->gart_info.bus_addr >> 12);
404 RADEON_WRITE(R700_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, dev_priv->gart_info.bus_addr >> 12);
1791 if (dev_priv->gart_info.bus_addr)
1792 r600_page_table_cleanup(dev, &dev_priv->gart_info);
1794 if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB) {
1795 drm_core_ioremapfree(&dev_priv->gart_info.mapping, dev);
1796 dev_priv->gart_info.addr = 0;
2047 dev_priv->gart_info.table_mask = DMA_BIT_MASK(32);
2057 dev_priv->gart_info.bus_addr =
2059 dev_priv->gart_info.mapping.offset =
2061 dev_priv->gart_info.mapping.size =
2062 dev_priv->gart_info.table_size;
2064 drm_core_ioremap_wc(&dev_priv->gart_info.mapping, dev);
2065 if (!dev_priv->gart_info.mapping.virtual) {
2071 dev_priv->gart_info.addr =
2072 dev_priv->gart_info.mapping.virtual;
2075 dev_priv->gart_info.addr,