dev/drm/i915_irq.c

42  * Since pipe events are edge-triggered from the PIPESTAT register to IIR,
82 i915_pipestat(int pipe)
84 	if (pipe == 0)
86 	if (pipe == 1)
92 i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask)
94 	if ((dev_priv->pipestat[pipe] & mask) != mask) {
95 		u32 reg = i915_pipestat(pipe);
97 		dev_priv->pipestat[pipe] |= mask;
99 		I915_WRITE(reg, dev_priv->pipestat[pipe] | (mask >> 16));
105 i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask)
107 	if ((dev_priv->pipestat[pipe] & mask) != 0) {
108 		u32 reg = i915_pipestat(pipe);
110 		dev_priv->pipestat[pipe] &= ~mask;
111 		I915_WRITE(reg, dev_priv->pipestat[pipe]);
117  * i915_pipe_enabled - check if a pipe is enabled
119  * @pipe: pipe to check
121  * Reading certain registers when the pipe is disabled can hang the chip.
122  * Use this routine to make sure the PLL is running and the pipe is active
126 i915_pipe_enabled(struct drm_device *dev, int pipe)
129 	unsigned long pipeconf = pipe ? PIPEBCONF : PIPEACONF;
138  * we use as a pipe index
140 u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
147 	high_frame = pipe ? PIPEBFRAMEHIGH : PIPEAFRAMEHIGH;
148 	low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
150 	if (!i915_pipe_enabled(dev, pipe)) {
151 		DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe);
174 u32 g45_get_vblank_counter(struct drm_device *dev, int pipe)
177 	int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45;
179 	if (!i915_pipe_enabled(dev, pipe)) {
180 		DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe);
402  * we use as a pipe index
404 int i915_enable_vblank(struct drm_device *dev, int pipe)
408 	if (!i915_pipe_enabled(dev, pipe))
413 		i915_enable_pipestat(dev_priv, pipe,
416 		i915_enable_pipestat(dev_priv, pipe,
423  * we use as a pipe index
425 void i915_disable_vblank(struct drm_device *dev, int pipe)
430 	i915_disable_pipestat(dev_priv, pipe,
436 /* Set the vblank monitor pipe
455 	drm_i915_vblank_pipe_t *pipe = data;
462 	pipe->pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B;
513 	/* Disable pipe interrupt enables, clear pending pipe status */