dev/drm/i915_dma.c

44 	drm_i915_private_t *dev_priv = dev->dev_private;
45 	drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
61 		if (dev_priv->sarea_priv)
62 			dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
84 	drm_i915_private_t *dev_priv = dev->dev_private;
88 	dev_priv->status_page_dmah =
91 	if (!dev_priv->status_page_dmah) {
95 	dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
96 	dev_priv->dma_status_page = dev_priv->status_page_dmah->busaddr;
98 	memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
100 	I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
111 	drm_i915_private_t *dev_priv = dev->dev_private;
112 	if (dev_priv->status_page_dmah) {
113 		drm_pci_free(dev, dev_priv->status_page_dmah);
114 		dev_priv->status_page_dmah = NULL;
117 	if (dev_priv->status_gfx_addr) {
118 		dev_priv->status_gfx_addr = 0;
119 		drm_core_ioremapfree(&dev_priv->hws_map, dev);
128 	drm_i915_private_t *dev_priv = dev->dev_private;
129 	drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
137 	if (ring->head == ring->tail && dev_priv->sarea_priv)
138 		dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
143 	drm_i915_private_t *dev_priv = dev->dev_private;
151 	if (dev_priv->ring.virtual_start) {
152 		drm_core_ioremapfree(&dev_priv->ring.map, dev);
153 		dev_priv->ring.virtual_start = NULL;
154 		dev_priv->ring.map.virtual = NULL;
155 		dev_priv->ring.map.size = 0;
167 	drm_i915_private_t *dev_priv = dev->dev_private;
169 	dev_priv->sarea = drm_getsarea(dev);
170 	if (!dev_priv->sarea) {
176 	dev_priv->sarea_priv = (drm_i915_sarea_t *)
177 	    ((u8 *) dev_priv->sarea->virtual + init->sarea_priv_offset);
180 		if (dev_priv->ring.ring_obj != NULL) {
187 		dev_priv->ring.Size = init->ring_size;
188 		dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
190 		dev_priv->ring.map.offset = init->ring_start;
191 		dev_priv->ring.map.size = init->ring_size;
192 		dev_priv->ring.map.type = 0;
193 		dev_priv->ring.map.flags = 0;
194 		dev_priv->ring.map.mtrr = 0;
196 		drm_core_ioremap_wc(&dev_priv->ring.map, dev);
198 		if (dev_priv->ring.map.virtual == NULL) {
206 	dev_priv->ring.virtual_start = dev_priv->ring.map.virtual;
208 	dev_priv->cpp = init->cpp;
209 	dev_priv->back_offset = init->back_offset;
210 	dev_priv->front_offset = init->front_offset;
211 	dev_priv->current_page = 0;
212 	dev_priv->sarea_priv->pf_current_page = 0;
216 	dev_priv->allow_batchbuffer = 1;
223 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
227 	if (!dev_priv->sarea) {
232 	if (dev_priv->ring.map.virtual == NULL) {
239 	if (!dev_priv->hw_status_page) {
243 	DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
245 	if (dev_priv->status_gfx_addr != 0)
246 		I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
248 		I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
357 	drm_i915_private_t *dev_priv = dev->dev_private;
361 	if ((dwords+1) * sizeof(int) >= dev_priv->ring.Size - 8)
398 	drm_i915_private_t *dev_priv = dev->dev_private;
439 	drm_i915_private_t *dev_priv = dev->dev_private;
442 	if (++dev_priv->counter > 0x7FFFFFFFUL)
443 		dev_priv->counter = 0;
444 	if (dev_priv->sarea_priv)
445 		dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
450 	OUT_RING(dev_priv->counter);
490 	drm_i915_private_t *dev_priv = dev->dev_private;
540 	drm_i915_private_t *dev_priv = dev->dev_private;
543 	if (!dev_priv->sarea_priv)
548 		  dev_priv->current_page,
549 		  dev_priv->sarea_priv->pf_current_page);
561 	if (dev_priv->current_page == 0) {
562 		OUT_RING(dev_priv->back_offset);
563 		dev_priv->current_page = 1;
565 		OUT_RING(dev_priv->front_offset);
566 		dev_priv->current_page = 0;
576 	if (++dev_priv->counter > 0x7FFFFFFFUL)
577 		dev_priv->counter = 0;
578 	if (dev_priv->sarea_priv)
579 		dev_priv->sarea_priv->last_enqueue = dev_priv->counter;
584 	OUT_RING(dev_priv->counter);
588 	dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
594 	drm_i915_private_t *dev_priv = dev->dev_private;
597 	return i915_wait_ring(dev, dev_priv->ring.Size - 8, __func__);
615 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
617 	    dev_priv->sarea_priv;
622 	if (!dev_priv->allow_batchbuffer) {
656 		sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
664 	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
666 	    dev_priv->sarea_priv;
713 		sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
734 	drm_i915_private_t *dev_priv = dev->dev_private;
738 	if (!dev_priv) {
748 		value = dev_priv->allow_batchbuffer ? 1 : 0;
751 		value = READ_BREADCRUMB(dev_priv);
776 	drm_i915_private_t *dev_priv = dev->dev_private;
779 	if (!dev_priv) {
788 		dev_priv->tex_lru_log_granularity = param->value;
791 		dev_priv->allow_batchbuffer = param->value;
804 	drm_i915_private_t *dev_priv = dev->dev_private;
810 	if (!dev_priv) {
817 	dev_priv->status_gfx_addr = hws->addr & (0x1ffff<<12);
819 	dev_priv->hws_map.offset = dev->agp->base + hws->addr;
820 	dev_priv->hws_map.size = 4*1024;
821 	dev_priv->hws_map.type = 0;
822 	dev_priv->hws_map.flags = 0;
823 	dev_priv->hws_map.mtrr = 0;
825 	drm_core_ioremap_wc(&dev_priv->hws_map, dev);
826 	if (dev_priv->hws_map.virtual == NULL) {
828 		dev_priv->status_gfx_addr = 0;
833 	dev_priv->hw_status_page = dev_priv->hws_map.virtual;
835 	memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
836 	I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
838 			dev_priv->status_gfx_addr);
839 	DRM_DEBUG("load hws at %p\n", dev_priv->hw_status_page);
845 	struct drm_i915_private *dev_priv = dev->dev_private;
856 	dev_priv = drm_alloc(sizeof(drm_i915_private_t), DRM_MEM_DRIVER);
857 	if (dev_priv == NULL)
860 	memset(dev_priv, 0, sizeof(drm_i915_private_t));
862 	dev->dev_private = (void *)dev_priv;
863 	dev_priv->dev = dev;
870 	    _DRM_KERNEL | _DRM_DRIVER, &dev_priv->mmio_map);
887 			drm_rmmap(dev, dev_priv->mmio_map);
888 			drm_free(dev_priv, sizeof(struct drm_i915_private),
910 	DRM_SPININIT(&dev_priv->user_irq_lock, "userirq");
911 	dev_priv->user_irq_refcount = 0;
925 	struct drm_i915_private *dev_priv = dev->dev_private;
929 	drm_rmmap(dev, dev_priv->mmio_map);
933 	DRM_SPINUNINIT(&dev_priv->user_irq_lock);
962 	drm_i915_private_t *dev_priv = dev->dev_private;
964 	if (!dev_priv)
969 	if (dev_priv->agp_heap)
970 		i915_mem_takedown(&(dev_priv->agp_heap));
977 	drm_i915_private_t *dev_priv = dev->dev_private;
978 	i915_mem_release(dev, file_priv, dev_priv->agp_heap);