Lines Matching refs:mac
378 bwn_phy_lp_init_pre(struct bwn_mac *mac)
380 struct bwn_phy *phy = &mac->mac_phy;
387 bwn_phy_lp_init(struct bwn_mac *mac)
406 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
407 struct bwn_softc *sc = mac->mac_sc;
413 bwn_phy_lp_readsprom(mac); /* XXX bad place */
414 bwn_phy_lp_bbinit(mac);
417 BWN_PHY_SET(mac, BWN_PHY_4WIRECTL, 0x2);
419 BWN_PHY_MASK(mac, BWN_PHY_4WIRECTL, 0xfffd);
422 if (mac->mac_phy.rf_ver == 0x2062)
423 bwn_phy_lp_b2062_init(mac);
425 bwn_phy_lp_b2063_init(mac);
430 tmp = BWN_RF_READ(mac, st->st_rfaddr);
433 BWN_PHY_SETMASK(mac,
438 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xf0), 0x5f80);
439 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xf1), 0);
443 if (mac->mac_phy.rev >= 2)
444 bwn_phy_lp_rxcal_r2(mac);
447 bwn_phy_lp_rccal_r12(mac);
449 bwn_phy_lp_set_rccap(mac);
451 error = bwn_phy_lp_switch_channel(mac, 7);
455 bwn_phy_lp_txpctl_init(mac);
456 bwn_phy_lp_calib(mac);
461 bwn_phy_lp_read(struct bwn_mac *mac, uint16_t reg)
464 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
465 return (BWN_READ_2(mac, BWN_PHYDATA));
469 bwn_phy_lp_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)
472 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
473 BWN_WRITE_2(mac, BWN_PHYDATA, value);
477 bwn_phy_lp_maskset(struct bwn_mac *mac, uint16_t reg, uint16_t mask,
481 BWN_WRITE_2(mac, BWN_PHYCTL, reg);
482 BWN_WRITE_2(mac, BWN_PHYDATA,
483 (BWN_READ_2(mac, BWN_PHYDATA) & mask) | set);
487 bwn_phy_lp_rf_read(struct bwn_mac *mac, uint16_t reg)
491 if (mac->mac_phy.rev < 2 && reg != 0x4001)
493 if (mac->mac_phy.rev >= 2)
495 BWN_WRITE_2(mac, BWN_RFCTL, reg);
496 return BWN_READ_2(mac, BWN_RFDATALO);
500 bwn_phy_lp_rf_write(struct bwn_mac *mac, uint16_t reg, uint16_t value)
504 BWN_WRITE_2(mac, BWN_RFCTL, reg);
505 BWN_WRITE_2(mac, BWN_RFDATALO, value);
509 bwn_phy_lp_rf_onoff(struct bwn_mac *mac, int on)
513 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xe0ff);
514 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2,
515 (mac->mac_phy.rev >= 2) ? 0xf7f7 : 0xffe7);
519 if (mac->mac_phy.rev >= 2) {
520 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x83ff);
521 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x1f00);
522 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS, 0x80ff);
523 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xdfff);
524 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x0808);
528 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xe0ff);
529 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x1f00);
530 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfcff);
531 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x0018);
535 bwn_phy_lp_switch_channel(struct bwn_mac *mac, uint32_t chan)
537 struct bwn_phy *phy = &mac->mac_phy;
542 error = bwn_phy_lp_b2063_switch_channel(mac, chan);
546 error = bwn_phy_lp_b2062_switch_channel(mac, chan);
549 bwn_phy_lp_set_anafilter(mac, chan);
550 bwn_phy_lp_set_gaintbl(mac, ieee80211_ieee2mhz(chan, 0));
554 BWN_WRITE_2(mac, BWN_CHANNEL, chan);
559 bwn_phy_lp_get_default_chan(struct bwn_mac *mac)
561 struct bwn_softc *sc = mac->mac_sc;
568 bwn_phy_lp_set_antenna(struct bwn_mac *mac, int antenna)
570 struct bwn_phy *phy = &mac->mac_phy;
576 bwn_hf_write(mac, bwn_hf_read(mac) & ~BWN_HF_UCODE_ANTDIV_HELPER);
577 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xfffd, antenna & 0x2);
578 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xfffe, antenna & 0x1);
579 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_UCODE_ANTDIV_HELPER);
584 bwn_phy_lp_task_60s(struct bwn_mac *mac)
587 bwn_phy_lp_calib(mac);
591 bwn_phy_lp_readsprom(struct bwn_mac *mac)
593 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
594 struct bwn_softc *sc = mac->mac_sc;
618 bwn_phy_lp_bbinit(struct bwn_mac *mac)
621 bwn_phy_lp_tblinit(mac);
622 if (mac->mac_phy.rev >= 2)
623 bwn_phy_lp_bbinit_r2(mac);
625 bwn_phy_lp_bbinit_r01(mac);
629 bwn_phy_lp_txpctl_init(struct bwn_mac *mac)
633 struct bwn_softc *sc = mac->mac_sc;
636 bwn_phy_lp_set_txgain(mac,
638 bwn_phy_lp_set_bbmult(mac, 150);
642 bwn_phy_lp_calib(struct bwn_mac *mac)
644 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
645 struct bwn_softc *sc = mac->mac_sc;
657 bwn_mac_suspend(mac);
660 BWN_WRITE_2(mac, BWN_BTCOEX_CTL, 0x3);
661 BWN_WRITE_2(mac, BWN_BTCOEX_TXCTL, 0xff);
663 if (mac->mac_phy.rev >= 2)
664 bwn_phy_lp_digflt_save(mac);
665 bwn_phy_lp_get_txpctlmode(mac);
667 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
668 if (mac->mac_phy.rev == 0 && mode != BWN_PHYLP_TXPCTL_OFF)
669 bwn_phy_lp_bugfix(mac);
670 if (mac->mac_phy.rev >= 2 && fc == 1) {
671 bwn_phy_lp_get_txpctlmode(mac);
673 oafeovr = BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVR) & 0x40;
675 ogain = bwn_phy_lp_get_txgain(mac);
676 orf = BWN_PHY_READ(mac, BWN_PHY_RF_PWR_OVERRIDE) & 0xff;
677 obbmult = bwn_phy_lp_get_bbmult(mac);
678 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
680 bwn_phy_lp_set_txgain(mac, &ogain);
681 bwn_phy_lp_set_bbmult(mac, obbmult);
682 bwn_phy_lp_set_txpctlmode(mac, omode);
683 BWN_PHY_SETMASK(mac, BWN_PHY_RF_PWR_OVERRIDE, 0xff00, orf);
685 bwn_phy_lp_set_txpctlmode(mac, mode);
686 if (mac->mac_phy.rev >= 2)
687 bwn_phy_lp_digflt_restore(mac);
695 } else if (mac->mac_phy.rev >= 2)
706 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0xff00, rc->rc_c1);
707 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0x00ff, rc->rc_c0 << 8);
709 bwn_phy_lp_set_trsw_over(mac, 1 /* TX */, 0 /* RX */);
712 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x8);
713 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfff7, 0);
715 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x20);
716 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xffdf, 0);
719 bwn_phy_lp_set_rxgain(mac, 0x2d5d);
720 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xfffe);
721 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVRVAL, 0xfffe);
722 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x800);
723 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x800);
724 bwn_phy_lp_set_deaf(mac, 0);
726 (void)bwn_phy_lp_calc_rx_iq_comp(mac, 0xfff0);
727 bwn_phy_lp_clear_deaf(mac, 0);
728 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xfffc);
729 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xfff7);
730 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xffdf);
733 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xfffe);
734 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xffef);
735 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xffbf);
736 if (mac->mac_phy.rev >= 2) {
737 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfeff);
739 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfbff);
740 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0xe5), 0xfff7);
743 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfdff);
746 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xfffe);
747 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVRVAL, 0xf7ff);
749 bwn_mac_enable(mac);
753 bwn_phy_lp_switch_analog(struct bwn_mac *mac, int on)
757 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xfff8);
761 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVRVAL, 0x0007);
762 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVR, 0x0007);
766 bwn_phy_lp_b2063_switch_channel(struct bwn_mac *mac, uint8_t chan)
769 struct bwn_softc *sc = mac->mac_sc;
784 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_VCOBUF1, bc->bc_data[0]);
785 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_MIXER2, bc->bc_data[1]);
786 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_BUF2, bc->bc_data[2]);
787 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_RCCR1, bc->bc_data[3]);
788 BWN_RF_WRITE(mac, BWN_B2063_A_RX_1ST3, bc->bc_data[4]);
789 BWN_RF_WRITE(mac, BWN_B2063_A_RX_2ND1, bc->bc_data[5]);
790 BWN_RF_WRITE(mac, BWN_B2063_A_RX_2ND4, bc->bc_data[6]);
791 BWN_RF_WRITE(mac, BWN_B2063_A_RX_2ND7, bc->bc_data[7]);
792 BWN_RF_WRITE(mac, BWN_B2063_A_RX_PS6, bc->bc_data[8]);
793 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_CTL2, bc->bc_data[9]);
794 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_CTL5, bc->bc_data[10]);
795 BWN_RF_WRITE(mac, BWN_B2063_PA_CTL11, bc->bc_data[11]);
797 old = BWN_RF_READ(mac, BWN_B2063_COM15);
798 BWN_RF_SET(mac, BWN_B2063_COM15, 0x1e);
808 BWN_RF_WRITE(mac, BWN_B2063_JTAG_VCO_CALIB3, 0x2);
809 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_VCO_CALIB6,
811 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_VCO_CALIB7,
813 BWN_RF_WRITE(mac, BWN_B2063_JTAG_VCO_CALIB5, timeoutref);
821 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_VCO_CALIB7,
823 BWN_RF_WRITE(mac, BWN_B2063_JTAG_VCO_CALIB8, count & 0xff);
831 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_SG1, 0xffe0, tmp[0] >> 4);
832 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_SG2, 0xfe0f, tmp[0] << 4);
833 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_SG2, 0xfff0, tmp[0] >> 16);
834 BWN_RF_WRITE(mac, BWN_B2063_JTAG_SG3, (tmp[1] >> 8) & 0xff);
835 BWN_RF_WRITE(mac, BWN_B2063_JTAG_SG4, tmp[1] & 0xff);
837 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF1, 0xb9);
838 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF2, 0x88);
839 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF3, 0x28);
840 BWN_RF_WRITE(mac, BWN_B2063_JTAG_LF4, 0x63);
852 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP2, 0xffc0, tmp[4]);
853 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP2, 0xffbf, scale << 6);
860 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP3, 0xffe0, tmp[5]);
861 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_CP3, 0xffdf, scale << 5);
863 BWN_RF_SETMASK(mac, BWN_B2063_JTAG_XTAL_12, 0xfffb, 0x4);
865 BWN_RF_SET(mac, BWN_B2063_JTAG_XTAL_12, 0x2);
867 BWN_RF_MASK(mac, BWN_B2063_JTAG_XTAL_12, 0xfd);
870 BWN_RF_SET(mac, BWN_B2063_JTAG_VCO1, 0x2);
872 BWN_RF_MASK(mac, BWN_B2063_JTAG_VCO1, 0xfd);
874 BWN_RF_SET(mac, BWN_B2063_PLL_SP2, 0x3);
876 BWN_RF_MASK(mac, BWN_B2063_PLL_SP2, 0xfffc);
879 BWN_RF_MASK(mac, BWN_B2063_PLL_SP1, ~0x40);
880 tmp16 = BWN_RF_READ(mac, BWN_B2063_JTAG_CALNRST) & 0xf8;
881 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16);
883 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16 | 0x4);
885 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16 | 0x6);
887 BWN_RF_WRITE(mac, BWN_B2063_JTAG_CALNRST, tmp16 | 0x7);
889 BWN_RF_SET(mac, BWN_B2063_PLL_SP1, 0x40);
891 BWN_RF_WRITE(mac, BWN_B2063_COM15, old);
896 bwn_phy_lp_b2062_switch_channel(struct bwn_mac *mac, uint8_t chan)
898 struct bwn_softc *sc = mac->mac_sc;
899 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
915 BWN_RF_SET(mac, BWN_B2062_S_RFPLLCTL14, 0x04);
916 BWN_RF_WRITE(mac, BWN_B2062_N_LGENATUNE0, bc->bc_data[0]);
917 BWN_RF_WRITE(mac, BWN_B2062_N_LGENATUNE2, bc->bc_data[1]);
918 BWN_RF_WRITE(mac, BWN_B2062_N_LGENATUNE3, bc->bc_data[2]);
919 BWN_RF_WRITE(mac, BWN_B2062_N_TX_TUNE, bc->bc_data[3]);
920 BWN_RF_WRITE(mac, BWN_B2062_S_LGENG_CTL1, bc->bc_data[4]);
921 BWN_RF_WRITE(mac, BWN_B2062_N_LGENACTL5, bc->bc_data[5]);
922 BWN_RF_WRITE(mac, BWN_B2062_N_LGENACTL6, bc->bc_data[6]);
923 BWN_RF_WRITE(mac, BWN_B2062_N_TX_PGA, bc->bc_data[7]);
924 BWN_RF_WRITE(mac, BWN_B2062_N_TX_PAD, bc->bc_data[8]);
926 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL33, 0xcc);
927 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL34, 0x07);
928 bwn_phy_lp_b2062_reset_pllbias(mac);
937 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL26, tmp[5]);
941 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL27, tmp[5]);
945 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL28, tmp[5]);
949 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL29,
951 tmp[7] = BWN_RF_READ(mac, BWN_B2062_S_RFPLLCTL19);
953 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL23, (tmp[8] >> 8) + 16);
954 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL24, tmp[8] & 0xff);
956 bwn_phy_lp_b2062_vco_calib(mac);
957 if (BWN_RF_READ(mac, BWN_B2062_S_RFPLLCTL3) & 0x10) {
958 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL33, 0xfc);
959 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL34, 0);
960 bwn_phy_lp_b2062_reset_pllbias(mac);
961 bwn_phy_lp_b2062_vco_calib(mac);
962 if (BWN_RF_READ(mac, BWN_B2062_S_RFPLLCTL3) & 0x10) {
963 BWN_RF_MASK(mac, BWN_B2062_S_RFPLLCTL14, ~0x04);
967 BWN_RF_MASK(mac, BWN_B2062_S_RFPLLCTL14, ~0x04);
972 bwn_phy_lp_set_anafilter(struct bwn_mac *mac, uint8_t channel)
974 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
977 if (mac->mac_phy.rev < 2) {
978 BWN_PHY_SETMASK(mac, BWN_PHY_LP_PHY_CTL, 0xfcff, tmp << 9);
979 if ((mac->mac_phy.rev == 1) && (plp->plp_rccap))
980 bwn_phy_lp_set_rccap(mac);
984 BWN_RF_WRITE(mac, BWN_B2063_TX_BB_SP3, 0x3f);
988 bwn_phy_lp_set_gaintbl(struct bwn_mac *mac, uint32_t freq)
990 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
991 struct bwn_softc *sc = mac->mac_sc;
995 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
1010 bwn_tab_write_multi(mac, BWN_TAB_2(13, 0), 3, tmp);
1011 bwn_tab_write_multi(mac, BWN_TAB_2(12, 0), 3, tmp);
1015 bwn_phy_lp_digflt_save(struct bwn_mac *mac)
1017 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1033 plp->plp_digfilt[i] = BWN_PHY_READ(mac, addr[i]);
1034 BWN_PHY_WRITE(mac, addr[i], val[i]);
1039 bwn_phy_lp_get_txpctlmode(struct bwn_mac *mac)
1041 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1042 struct bwn_softc *sc = mac->mac_sc;
1045 ctl = BWN_PHY_READ(mac, BWN_PHY_TX_PWR_CTL_CMD);
1064 bwn_phy_lp_set_txpctlmode(struct bwn_mac *mac, uint8_t mode)
1066 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1070 bwn_phy_lp_get_txpctlmode(mac);
1077 BWN_PHY_SETMASK(mac, BWN_PHY_TX_PWR_CTL_CMD, 0xff80,
1079 BWN_PHY_SETMASK(mac, BWN_PHY_TX_PWR_CTL_NNUM,
1083 if (mac->mac_phy.rev < 2)
1084 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfeff);
1086 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xff7f);
1087 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xbfff);
1089 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVR, 0xffbf);
1093 if (mac->mac_phy.rev >= 2) {
1095 BWN_PHY_SET(mac, BWN_PHY_OFDM(0xd0), 0x2);
1097 BWN_PHY_MASK(mac, BWN_PHY_OFDM(0xd0), 0xfffd);
1115 BWN_PHY_SETMASK(mac, BWN_PHY_TX_PWR_CTL_CMD,
1120 bwn_phy_lp_bugfix(struct bwn_mac *mac)
1122 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1123 struct bwn_softc *sc = mac->mac_sc;
1138 bwn_phy_lp_get_txpctlmode(mac);
1144 bwn_tab_read_multi(mac,
1145 (mac->mac_phy.rev < 2) ? BWN_TAB_4(10, 0x140) :
1148 bwn_phy_lp_tblinit(mac);
1149 bwn_phy_lp_bbinit(mac);
1150 bwn_phy_lp_txpctl_init(mac);
1151 bwn_phy_lp_rf_onoff(mac, 1);
1152 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
1154 bwn_tab_write_multi(mac,
1155 (mac->mac_phy.rev < 2) ? BWN_TAB_4(10, 0x140) :
1158 BWN_WRITE_2(mac, BWN_CHANNEL, plp->plp_chan);
1161 bwn_phy_lp_set_anafilter(mac, plp->plp_chan);
1165 bwn_phy_lp_get_txpctlmode(mac);
1167 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_ON_SW);
1168 if (mac->mac_phy.rev >= 2) {
1169 rxcomp = bwn_tab_read(mac,
1171 txgain = bwn_tab_read(mac,
1177 bwn_phy_lp_set_txgain(mac, &tg);
1179 rxcomp = bwn_tab_read(mac,
1181 txgain = bwn_tab_read(mac,
1183 BWN_PHY_SETMASK(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL,
1185 bwn_phy_lp_set_txgain_dac(mac, txgain & 0x7);
1186 bwn_phy_lp_set_txgain_pa(mac, (txgain >> 24) & 0x7f);
1188 bwn_phy_lp_set_bbmult(mac, (rxcomp >> 20) & 0xff);
1193 bwn_tab_write_multi(mac, BWN_TAB_2(0, 80), 2, value);
1195 coeff = bwn_tab_read(mac,
1196 (mac->mac_phy.rev >= 2) ? BWN_TAB_4(7, txpwridx + 448) :
1198 bwn_tab_write(mac, BWN_TAB_2(0, 85), coeff & 0xffff);
1199 if (mac->mac_phy.rev >= 2) {
1200 rfpwr = bwn_tab_read(mac,
1202 BWN_PHY_SETMASK(mac, BWN_PHY_RF_PWR_OVERRIDE, 0xff00,
1205 bwn_phy_lp_set_txgain_override(mac);
1208 bwn_phy_lp_set_rccap(mac);
1209 bwn_phy_lp_set_antenna(mac, plp->plp_antenna);
1210 bwn_phy_lp_set_txpctlmode(mac, mode);
1215 bwn_phy_lp_digflt_restore(struct bwn_mac *mac)
1217 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1228 BWN_PHY_WRITE(mac, addr[i], plp->plp_digfilt[i]);
1232 bwn_phy_lp_tblinit(struct bwn_mac *mac)
1234 uint32_t freq = ieee80211_ieee2mhz(bwn_phy_lp_get_default_chan(mac), 0);
1236 if (mac->mac_phy.rev < 2) {
1237 bwn_phy_lp_tblinit_r01(mac);
1238 bwn_phy_lp_tblinit_txgain(mac);
1239 bwn_phy_lp_set_gaintbl(mac, freq);
1243 bwn_phy_lp_tblinit_r2(mac);
1244 bwn_phy_lp_tblinit_txgain(mac);
1259 bwn_phy_lp_bbinit_r2(struct bwn_mac *mac)
1261 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1262 struct bwn_softc *sc = mac->mac_sc;
1297 BWN_PHY_WRITE(mac, v1[i].reg, v1[i].value);
1298 BWN_PHY_SET(mac, BWN_PHY_ADC_COMPENSATION_CTL, 0x10);
1300 BWN_PHY_SETMASK(mac, v2[i].offset, v2[i].mask, v2[i].set);
1302 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, ~0x4000);
1303 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, ~0x2000);
1304 BWN_PHY_SET(mac, BWN_PHY_OFDM(0x10a), 0x1);
1306 bwn_tab_write(mac, BWN_TAB_4(17, 65), 0xec);
1307 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x10a), 0xff01, 0x14);
1309 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0x10a), 0xff01, 0x10);
1311 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xdf), 0xff00, 0xf4);
1312 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xdf), 0x00ff, 0xf100);
1313 BWN_PHY_WRITE(mac, BWN_PHY_CLIPTHRESH, 0x48);
1314 BWN_PHY_SETMASK(mac, BWN_PHY_HIGAINDB, 0xff00, 0x46);
1315 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xe4), 0xff00, 0x10);
1316 BWN_PHY_SETMASK(mac, BWN_PHY_PWR_THRESH1, 0xfff0, 0x9);
1317 BWN_PHY_MASK(mac, BWN_PHY_GAINDIRECTMISMATCH, ~0xf);
1318 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0x00ff, 0x5500);
1319 BWN_PHY_SETMASK(mac, BWN_PHY_CLIPCTRTHRESH, 0xfc1f, 0xa0);
1320 BWN_PHY_SETMASK(mac, BWN_PHY_GAINDIRECTMISMATCH, 0xe0ff, 0x300);
1321 BWN_PHY_SETMASK(mac, BWN_PHY_HIGAINDB, 0x00ff, 0x2a00);
1324 BWN_PHY_SETMASK(mac, BWN_PHY_LOWGAINDB, 0x00ff, 0x2100);
1325 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0xff00, 0xa);
1327 BWN_PHY_SETMASK(mac, BWN_PHY_LOWGAINDB, 0x00ff, 0x1e00);
1328 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0xff00, 0xd);
1331 BWN_PHY_SETMASK(mac, v3[i].offset, v3[i].mask, v3[i].set);
1334 bwn_tab_write(mac, BWN_TAB_2(0x08, 0x14), 0);
1335 bwn_tab_write(mac, BWN_TAB_2(0x08, 0x12), 0x40);
1339 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x40);
1340 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xf0ff, 0xb00);
1341 BWN_PHY_SETMASK(mac, BWN_PHY_SYNCPEAKCNT, 0xfff8, 0x6);
1342 BWN_PHY_SETMASK(mac, BWN_PHY_MINPWR_LEVEL, 0x00ff, 0x9d00);
1343 BWN_PHY_SETMASK(mac, BWN_PHY_MINPWR_LEVEL, 0xff00, 0xa1);
1344 BWN_PHY_MASK(mac, BWN_PHY_IDLEAFTERPKTRXTO, 0x00ff);
1346 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, ~0x40);
1348 BWN_PHY_SETMASK(mac, BWN_PHY_CRS_ED_THRESH, 0xff00, 0xb3);
1349 BWN_PHY_SETMASK(mac, BWN_PHY_CRS_ED_THRESH, 0x00ff, 0xad00);
1350 BWN_PHY_SETMASK(mac, BWN_PHY_INPUT_PWRDB, 0xff00, plp->plp_rxpwroffset);
1351 BWN_PHY_SET(mac, BWN_PHY_RESET_CTL, 0x44);
1352 BWN_PHY_WRITE(mac, BWN_PHY_RESET_CTL, 0x80);
1353 BWN_PHY_WRITE(mac, BWN_PHY_AFE_RSSI_CTL_0, 0xa954);
1354 BWN_PHY_WRITE(mac, BWN_PHY_AFE_RSSI_CTL_1,
1360 BWN_PHY_SET(mac, BWN_PHY_AFE_ADC_CTL_0, 0x1c);
1361 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_CTL, 0x00ff, 0x8800);
1362 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_ADC_CTL_1, 0xfc3c, 0x0400);
1365 bwn_phy_lp_digflt_save(mac);
1369 bwn_phy_lp_bbinit_r01(struct bwn_mac *mac)
1371 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1372 struct bwn_softc *sc = mac->mac_sc;
1434 BWN_PHY_MASK(mac, BWN_PHY_AFE_DAC_CTL, 0xf7ff);
1435 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL, 0);
1436 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL_OVR, 0);
1437 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_0, 0);
1438 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2, 0);
1439 BWN_PHY_SET(mac, BWN_PHY_AFE_DAC_CTL, 0x0004);
1440 BWN_PHY_SETMASK(mac, BWN_PHY_OFDMSYNCTHRESH0, 0xff00, 0x0078);
1441 BWN_PHY_SETMASK(mac, BWN_PHY_CLIPCTRTHRESH, 0x83ff, 0x5800);
1442 BWN_PHY_WRITE(mac, BWN_PHY_ADC_COMPENSATION_CTL, 0x0016);
1443 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_ADC_CTL_0, 0xfff8, 0x0004);
1444 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0x00ff, 0x5400);
1445 BWN_PHY_SETMASK(mac, BWN_PHY_HIGAINDB, 0x00ff, 0x2400);
1446 BWN_PHY_SETMASK(mac, BWN_PHY_LOWGAINDB, 0x00ff, 0x2100);
1447 BWN_PHY_SETMASK(mac, BWN_PHY_VERYLOWGAINDB, 0xff00, 0x0006);
1448 BWN_PHY_MASK(mac, BWN_PHY_RX_RADIO_CTL, 0xfffe);
1450 BWN_PHY_SETMASK(mac, v1[i].offset, v1[i].mask, v1[i].set);
1451 BWN_PHY_SETMASK(mac, BWN_PHY_INPUT_PWRDB,
1458 if (mac->mac_phy.rev == 0)
1459 BWN_PHY_SETMASK(mac, BWN_PHY_LP_RF_SIGNAL_LUT,
1461 bwn_tab_write(mac, BWN_TAB_2(11, 7), 60);
1464 BWN_PHY_SETMASK(mac, BWN_PHY_LP_RF_SIGNAL_LUT, 0xffcf, 0x0020);
1465 bwn_tab_write(mac, BWN_TAB_2(11, 7), 100);
1468 BWN_PHY_WRITE(mac, BWN_PHY_AFE_RSSI_CTL_0, tmp);
1470 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_RSSI_CTL_1, 0xf000, 0x0aaa);
1472 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_RSSI_CTL_1, 0xf000, 0x02aa);
1473 bwn_tab_write(mac, BWN_TAB_2(11, 1), 24);
1474 BWN_PHY_SETMASK(mac, BWN_PHY_RX_RADIO_CTL,
1476 if (mac->mac_phy.rev == 1 &&
1479 BWN_PHY_SETMASK(mac, v2[i].offset, v2[i].mask,
1483 ((mac->mac_phy.rev == 0) &&
1486 BWN_PHY_SETMASK(mac, v3[i].offset, v3[i].mask,
1488 } else if (mac->mac_phy.rev == 1 ||
1491 BWN_PHY_SETMASK(mac, v4[i].offset, v4[i].mask,
1495 BWN_PHY_SETMASK(mac, v5[i].offset, v5[i].mask,
1498 if (mac->mac_phy.rev == 1 &&
1500 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_5, BWN_PHY_TR_LOOKUP_1);
1501 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_6, BWN_PHY_TR_LOOKUP_2);
1502 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_7, BWN_PHY_TR_LOOKUP_3);
1503 BWN_PHY_COPY(mac, BWN_PHY_TR_LOOKUP_8, BWN_PHY_TR_LOOKUP_4);
1508 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x0006);
1509 BWN_PHY_WRITE(mac, BWN_PHY_GPIO_SELECT, 0x0005);
1510 BWN_PHY_WRITE(mac, BWN_PHY_GPIO_OUTEN, 0xffff);
1511 bwn_hf_write(mac, bwn_hf_read(mac) | BWN_HF_PR45960W);
1514 BWN_PHY_SET(mac, BWN_PHY_LP_PHY_CTL, 0x8000);
1515 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x0040);
1516 BWN_PHY_SETMASK(mac, BWN_PHY_MINPWR_LEVEL, 0x00ff, 0xa400);
1517 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xf0ff, 0x0b00);
1518 BWN_PHY_SETMASK(mac, BWN_PHY_SYNCPEAKCNT, 0xfff8, 0x0007);
1519 BWN_PHY_SETMASK(mac, BWN_PHY_DSSS_CONFIRM_CNT, 0xfff8, 0x0003);
1520 BWN_PHY_SETMASK(mac, BWN_PHY_DSSS_CONFIRM_CNT, 0xffc7, 0x0020);
1521 BWN_PHY_MASK(mac, BWN_PHY_IDLEAFTERPKTRXTO, 0x00ff);
1523 BWN_PHY_MASK(mac, BWN_PHY_LP_PHY_CTL, 0x7fff);
1524 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, 0xffbf);
1526 if (mac->mac_phy.rev == 1) {
1527 tmp = BWN_PHY_READ(mac, BWN_PHY_CLIPCTRTHRESH);
1530 BWN_PHY_WRITE(mac, BWN_PHY_4C3, tmp2);
1531 tmp = BWN_PHY_READ(mac, BWN_PHY_GAINDIRECTMISMATCH);
1534 BWN_PHY_WRITE(mac, BWN_PHY_4C4, tmp2);
1535 tmp = BWN_PHY_READ(mac, BWN_PHY_VERYLOWGAINDB);
1538 BWN_PHY_WRITE(mac, BWN_PHY_4C5, tmp2);
1548 bwn_phy_lp_b2062_init(struct bwn_mac *mac)
1556 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1557 struct bwn_softc *sc = mac->mac_sc;
1581 bwn_phy_lp_b2062_tblinit(mac);
1584 BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);
1585 if (mac->mac_phy.rev > 0)
1586 BWN_RF_WRITE(mac, BWN_B2062_S_BG_CTL1,
1587 (BWN_RF_READ(mac, BWN_B2062_N_COM2) >> 1) | 0x80);
1589 BWN_RF_SET(mac, BWN_B2062_N_TSSI_CTL0, 0x1);
1591 BWN_RF_MASK(mac, BWN_B2062_N_TSSI_CTL0, ~0x1);
1600 BWN_RF_MASK(mac, BWN_B2062_S_RFPLLCTL1, 0xfffb);
1603 BWN_RF_SET(mac, BWN_B2062_S_RFPLLCTL1, 0x4);
1606 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL7,
1608 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL18,
1610 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL19,
1623 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL8,
1625 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL9,
1627 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL10, f->value[4]);
1628 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL11, f->value[5]);
1635 bwn_phy_lp_b2063_init(struct bwn_mac *mac)
1638 bwn_phy_lp_b2063_tblinit(mac);
1639 BWN_RF_WRITE(mac, BWN_B2063_LOGEN_SP5, 0);
1640 BWN_RF_SET(mac, BWN_B2063_COM8, 0x38);
1641 BWN_RF_WRITE(mac, BWN_B2063_REG_SP1, 0x56);
1642 BWN_RF_MASK(mac, BWN_B2063_RX_BB_CTL2, ~0x2);
1643 BWN_RF_WRITE(mac, BWN_B2063_PA_SP7, 0);
1644 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_SP6, 0x20);
1645 BWN_RF_WRITE(mac, BWN_B2063_TX_RF_SP9, 0x40);
1646 if (mac->mac_phy.rev == 2) {
1647 BWN_RF_WRITE(mac, BWN_B2063_PA_SP3, 0xa0);
1648 BWN_RF_WRITE(mac, BWN_B2063_PA_SP4, 0xa0);
1649 BWN_RF_WRITE(mac, BWN_B2063_PA_SP2, 0x18);
1651 BWN_RF_WRITE(mac, BWN_B2063_PA_SP3, 0x20);
1652 BWN_RF_WRITE(mac, BWN_B2063_PA_SP2, 0x20);
1657 bwn_phy_lp_rxcal_r2(struct bwn_mac *mac)
1659 struct bwn_softc *sc = mac->mac_sc;
1681 tmp = BWN_RF_READ(mac, BWN_B2063_RX_BB_SP8) & 0xff;
1684 BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);
1685 BWN_RF_MASK(mac, BWN_B2063_PLL_SP1, 0xf7);
1687 BWN_RF_WRITE(mac, v1[i].reg, v1[i].value);
1689 if (BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2)
1694 if (!(BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2))
1695 BWN_RF_WRITE(mac, BWN_B2063_RX_BB_SP8, tmp);
1697 tmp = BWN_RF_READ(mac, BWN_B2063_TX_BB_SP3) & 0xff;
1700 BWN_RF_WRITE(mac, v2[i].reg, v2[i].value);
1702 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL4, 0xfc);
1703 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL5, 0x0);
1705 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL4, 0x13);
1706 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL5, 0x1);
1708 BWN_RF_WRITE(mac, BWN_B2063_PA_SP7, 0x7d);
1710 if (BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2)
1714 if (!(BWN_RF_READ(mac, BWN_B2063_RC_CALIB_CTL6) & 0x2))
1715 BWN_RF_WRITE(mac, BWN_B2063_TX_BB_SP3, tmp);
1716 BWN_RF_WRITE(mac, BWN_B2063_RC_CALIB_CTL1, 0x7e);
1720 bwn_phy_lp_rccal_r12(struct bwn_mac *mac)
1722 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1723 struct bwn_softc *sc = mac->mac_sc;
1737 error = bwn_phy_lp_switch_channel(mac, 7);
1741 txo = (BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVR) & 0x40) ? 1 : 0;
1742 bbmult = bwn_phy_lp_get_bbmult(mac);
1744 tx_gains = bwn_phy_lp_get_txgain(mac);
1746 save[0] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_0);
1747 save[1] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_VAL_0);
1748 save[2] = BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVR);
1749 save[3] = BWN_PHY_READ(mac, BWN_PHY_AFE_CTL_OVRVAL);
1750 save[4] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_2);
1751 save[5] = BWN_PHY_READ(mac, BWN_PHY_RF_OVERRIDE_2_VAL);
1752 save[6] = BWN_PHY_READ(mac, BWN_PHY_LP_PHY_CTL);
1754 bwn_phy_lp_get_txpctlmode(mac);
1756 bwn_phy_lp_set_txpctlmode(mac, BWN_PHYLP_TXPCTL_OFF);
1759 bwn_phy_lp_set_deaf(mac, 1);
1760 bwn_phy_lp_set_trsw_over(mac, 0, 1);
1761 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffb);
1762 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x4);
1763 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfff7);
1764 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x8);
1765 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x10);
1766 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x10);
1767 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xffdf);
1768 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x20);
1769 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xffbf);
1770 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x40);
1771 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0x7);
1772 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0x38);
1773 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xff3f);
1774 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0x100);
1775 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfdff);
1776 BWN_PHY_WRITE(mac, BWN_PHY_PS_CTL_OVERRIDE_VAL0, 0);
1777 BWN_PHY_WRITE(mac, BWN_PHY_PS_CTL_OVERRIDE_VAL1, 1);
1778 BWN_PHY_WRITE(mac, BWN_PHY_PS_CTL_OVERRIDE_VAL2, 0x20);
1779 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfbff);
1780 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xf7ff);
1781 BWN_PHY_WRITE(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL, 0);
1782 BWN_PHY_WRITE(mac, BWN_PHY_RX_GAIN_CTL_OVERRIDE_VAL, 0x45af);
1783 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2, 0x3ff);
1785 loopback = bwn_phy_lp_loopback(mac);
1788 bwn_phy_lp_set_rxgain_idx(mac, loopback);
1789 BWN_PHY_SETMASK(mac, BWN_PHY_LP_PHY_CTL, 0xffbf, 0x40);
1790 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xfff8, 0x1);
1791 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xffc7, 0x8);
1792 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL, 0xff3f, 0xc0);
1797 BWN_RF_WRITE(mac, BWN_B2062_N_RXBB_CALIB2, i);
1800 bwn_phy_lp_ddfs_turnon(mac, 1, 1, j, j, 0);
1801 if (!(bwn_phy_lp_rx_iq_est(mac, 1000, 32, &ie)))
1814 bwn_phy_lp_ddfs_turnoff(mac);
1817 bwn_phy_lp_clear_deaf(mac, 1);
1818 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_0, 0xff80);
1819 BWN_PHY_MASK(mac, BWN_PHY_RF_OVERRIDE_2, 0xfc00);
1821 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_VAL_0, save[1]);
1822 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_0, save[0]);
1823 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL_OVRVAL, save[3]);
1824 BWN_PHY_WRITE(mac, BWN_PHY_AFE_CTL_OVR, save[2]);
1825 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2_VAL, save[5]);
1826 BWN_PHY_WRITE(mac, BWN_PHY_RF_OVERRIDE_2, save[4]);
1827 BWN_PHY_WRITE(mac, BWN_PHY_LP_PHY_CTL, save[6]);
1829 bwn_phy_lp_set_bbmult(mac, bbmult);
1831 bwn_phy_lp_set_txgain(mac, &tx_gains);
1832 bwn_phy_lp_set_txpctlmode(mac, txpctlmode);
1834 bwn_phy_lp_set_rccap(mac);
1838 bwn_phy_lp_set_rccap(struct bwn_mac *mac)
1840 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
1843 if (mac->mac_phy.rev == 1)
1846 BWN_RF_WRITE(mac, BWN_B2062_N_RXBB_CALIB2,
1848 BWN_RF_WRITE(mac, BWN_B2062_N_TXCTL_A, rc_cap | 0x80);
1849 BWN_RF_WRITE(mac, BWN_B2062_S_RXG_CNT16,
1874 bwn_phy_lp_b2062_reset_pllbias(struct bwn_mac *mac)
1876 struct bwn_softc *sc = mac->mac_sc;
1878 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL2, 0xff);
1881 BWN_RF_WRITE(mac, BWN_B2062_N_COM1, 4);
1882 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL2, 4);
1884 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL2, 0);
1890 bwn_phy_lp_b2062_vco_calib(struct bwn_mac *mac)
1893 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL21, 0x42);
1894 BWN_RF_WRITE(mac, BWN_B2062_S_RFPLLCTL21, 0x62);
1899 bwn_phy_lp_b2062_tblinit(struct bwn_mac *mac)
1903 struct bwn_softc *sc = mac->mac_sc;
1961 BWN_RF_WRITE(mac, br->br_offset, br->br_valueg);
1964 BWN_RF_WRITE(mac, br->br_offset, br->br_valuea);
1972 bwn_phy_lp_b2063_tblinit(struct bwn_mac *mac)
1976 struct bwn_softc *sc = mac->mac_sc;
2029 BWN_RF_WRITE(mac, br->br_offset, br->br_valueg);
2032 BWN_RF_WRITE(mac, br->br_offset, br->br_valuea);
2040 bwn_tab_read_multi(struct bwn_mac *mac, uint32_t typenoffset,
2051 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
2056 *data = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO) & 0xff;
2060 *((uint16_t *)data) = BWN_PHY_READ(mac,
2065 *((uint32_t *)data) = BWN_PHY_READ(mac,
2068 *((uint32_t *)data) |= BWN_PHY_READ(mac,
2079 bwn_tab_write_multi(struct bwn_mac *mac, uint32_t typenoffset,
2090 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
2099 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
2106 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
2111 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATAHI, value >> 16);
2112 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
2121 bwn_phy_lp_get_txgain(struct bwn_mac *mac)
2126 tg.tg_dac = (BWN_PHY_READ(mac, BWN_PHY_AFE_DAC_CTL) & 0x380) >> 7;
2127 if (mac->mac_phy.rev < 2) {
2128 tmp = BWN_PHY_READ(mac,
2136 tmp = BWN_PHY_READ(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL);
2137 tg.tg_pad = BWN_PHY_READ(mac, BWN_PHY_OFDM(0xfb)) & 0xff;
2144 bwn_phy_lp_get_bbmult(struct bwn_mac *mac)
2147 return (bwn_tab_read(mac, BWN_TAB_2(0, 87)) & 0xff00) >> 8;
2151 bwn_phy_lp_set_txgain(struct bwn_mac *mac, struct bwn_txgain *tg)
2155 if (mac->mac_phy.rev < 2) {
2156 BWN_PHY_SETMASK(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL, 0xf800,
2158 bwn_phy_lp_set_txgain_dac(mac, tg->tg_dac);
2159 bwn_phy_lp_set_txgain_override(mac);
2163 pa = bwn_phy_lp_get_pa_gain(mac);
2164 BWN_PHY_WRITE(mac, BWN_PHY_TX_GAIN_CTL_OVERRIDE_VAL,
2166 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfb), 0x8000,
2168 BWN_PHY_WRITE(mac, BWN_PHY_OFDM(0xfc), (tg->tg_pga << 8) | tg->tg_gm);
2169 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfd), 0x8000,
2171 bwn_phy_lp_set_txgain_dac(mac, tg->tg_dac);
2172 bwn_phy_lp_set_txgain_override(mac);
2176 bwn_phy_lp_set_bbmult(struct bwn_mac *mac, uint8_t bbmult)
2179 bwn_tab_write(mac, BWN_TAB_2(0, 87), (uint16_t)bbmult << 8);
2183 bwn_phy_lp_set_trsw_over(struct bwn_mac *mac, uint8_t tx, uint8_t rx)
2187 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffc, trsw);
2188 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x3);
2192 bwn_phy_lp_set_rxgain(struct bwn_mac *mac, uint32_t gain)
2194 struct bwn_softc *sc = mac->mac_sc;
2198 if (mac->mac_phy.rev < 2) {
2203 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffe, trsw);
2204 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
2206 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
2208 BWN_PHY_WRITE(mac, BWN_PHY_RX_GAIN_CTL_OVERRIDE_VAL, lna);
2215 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0xfffe, trsw);
2216 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
2218 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
2220 BWN_PHY_WRITE(mac, BWN_PHY_RX_GAIN_CTL_OVERRIDE_VAL, low_gain);
2221 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xfff0, high_gain);
2224 BWN_PHY_SETMASK(mac, BWN_PHY_RF_OVERRIDE_2_VAL,
2226 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xe6), 0xffe7,
2231 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x1);
2232 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x10);
2233 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x40);
2234 if (mac->mac_phy.rev >= 2) {
2235 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x100);
2237 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x400);
2238 BWN_PHY_SET(mac, BWN_PHY_OFDM(0xe5), 0x8);
2242 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x200);
2246 bwn_phy_lp_set_deaf(struct bwn_mac *mac, uint8_t user)
2248 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
2255 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xff1f, 0x80);
2259 bwn_phy_lp_clear_deaf(struct bwn_mac *mac, uint8_t user)
2261 struct bwn_phy_lp *plp = &mac->mac_phy.phy_lp;
2262 struct bwn_softc *sc = mac->mac_sc;
2274 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xff1f, 0x60);
2276 BWN_PHY_SETMASK(mac, BWN_PHY_CRSGAIN_CTL, 0xff1f, 0x20);
2280 bwn_phy_lp_calc_rx_iq_comp(struct bwn_mac *mac, uint16_t sample)
2303 v1 = BWN_PHY_READ(mac, BWN_PHY_RX_COMP_COEFF_S);
2307 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0xff00, 0x00c0);
2308 BWN_PHY_MASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0x00ff);
2310 ret = bwn_phy_lp_rx_iq_est(mac, sample, 32, &ie);
2322 tmp[1] = -bwn_sqrt(mac, tmp[1] - (tmp[0] * tmp[0]));
2326 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0xff00, v1);
2327 BWN_PHY_SETMASK(mac, BWN_PHY_RX_COMP_COEFF_S, 0x00ff, v0 << 8);
2334 bwn_phy_lp_tblinit_r01(struct bwn_mac *mac)
2501 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
2503 bwn_tab_write_multi(mac, BWN_TAB_1(2, 0), N(bwn_tab_sigsq_tbl),
2505 bwn_tab_write_multi(mac, BWN_TAB_2(1, 0), N(noisescale), noisescale);
2506 bwn_tab_write_multi(mac, BWN_TAB_2(14, 0), N(crsgainnft), crsgainnft);
2507 bwn_tab_write_multi(mac, BWN_TAB_2(8, 0), N(filterctl), filterctl);
2508 bwn_tab_write_multi(mac, BWN_TAB_4(9, 0), N(psctl), psctl);
2509 bwn_tab_write_multi(mac, BWN_TAB_1(6, 0), N(bwn_tab_pllfrac_tbl),
2511 bwn_tab_write_multi(mac, BWN_TAB_2(0, 0), N(bwn_tabl_iqlocal_tbl),
2513 if (mac->mac_phy.rev == 0) {
2514 bwn_tab_write_multi(mac, BWN_TAB_2(13, 0), N(ofdmcckgain_r0),
2516 bwn_tab_write_multi(mac, BWN_TAB_2(12, 0), N(ofdmcckgain_r0),
2519 bwn_tab_write_multi(mac, BWN_TAB_2(13, 0), N(ofdmcckgain_r1),
2521 bwn_tab_write_multi(mac, BWN_TAB_2(12, 0), N(ofdmcckgain_r1),
2524 bwn_tab_write_multi(mac, BWN_TAB_2(15, 0), N(gaindelta), gaindelta);
2525 bwn_tab_write_multi(mac, BWN_TAB_4(10, 0), N(txpwrctl), txpwrctl);
2529 bwn_phy_lp_tblinit_r2(struct bwn_mac *mac)
2531 struct bwn_softc *sc = mac->mac_sc;
2716 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
2719 bwn_tab_write(mac, BWN_TAB_4(7, i), 0);
2721 bwn_tab_write_multi(mac, BWN_TAB_1(2, 0), N(bwn_tab_sigsq_tbl),
2723 bwn_tab_write_multi(mac, BWN_TAB_2(1, 0), N(noisescale), noisescale);
2724 bwn_tab_write_multi(mac, BWN_TAB_4(11, 0), N(filterctl), filterctl);
2725 bwn_tab_write_multi(mac, BWN_TAB_4(12, 0), N(psctl), psctl);
2726 bwn_tab_write_multi(mac, BWN_TAB_4(13, 0), N(gainidx), gainidx);
2727 bwn_tab_write_multi(mac, BWN_TAB_2(14, 0), N(auxgainidx), auxgainidx);
2728 bwn_tab_write_multi(mac, BWN_TAB_2(15, 0), N(swctl), swctl);
2729 bwn_tab_write_multi(mac, BWN_TAB_1(16, 0), N(hf), hf);
2730 bwn_tab_write_multi(mac, BWN_TAB_4(17, 0), N(gainval), gainval);
2731 bwn_tab_write_multi(mac, BWN_TAB_2(18, 0), N(gain), gain);
2732 bwn_tab_write_multi(mac, BWN_TAB_1(6, 0), N(bwn_tab_pllfrac_tbl),
2734 bwn_tab_write_multi(mac, BWN_TAB_2(0, 0), N(bwn_tabl_iqlocal_tbl),
2736 bwn_tab_write_multi(mac, BWN_TAB_4(9, 0), N(papdeps), papdeps);
2737 bwn_tab_write_multi(mac, BWN_TAB_4(10, 0), N(papdmult), papdmult);
2741 bwn_tab_write_multi(mac, BWN_TAB_4(13, 0), N(gainidx_a0),
2743 bwn_tab_write_multi(mac, BWN_TAB_2(14, 0), N(auxgainidx_a0),
2745 bwn_tab_write_multi(mac, BWN_TAB_4(17, 0), N(gainval_a0),
2747 bwn_tab_write_multi(mac, BWN_TAB_2(18, 0), N(gain_a0), gain_a0);
2752 bwn_phy_lp_tblinit_txgain(struct bwn_mac *mac)
2754 struct bwn_softc *sc = mac->mac_sc;
3356 if (mac->mac_phy.rev != 0 && mac->mac_phy.rev != 1) {
3358 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_r2);
3360 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
3363 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
3368 if (mac->mac_phy.rev == 0) {
3371 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_r0);
3373 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
3376 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128,
3383 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_r1);
3385 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_2ghz_r1);
3387 bwn_phy_lp_gaintbl_write_multi(mac, 0, 128, txgain_5ghz_r1);
3391 bwn_tab_write(struct bwn_mac *mac, uint32_t typeoffset, uint32_t value)
3402 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3403 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
3408 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3409 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
3412 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3413 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATAHI, value >> 16);
3414 BWN_PHY_WRITE(mac, BWN_PHY_TABLEDATALO, value);
3422 bwn_phy_lp_loopback(struct bwn_mac *mac)
3430 bwn_phy_lp_set_trsw_over(mac, 1, 1);
3431 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVR, 1);
3432 BWN_PHY_MASK(mac, BWN_PHY_AFE_CTL_OVRVAL, 0xfffe);
3433 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x800);
3434 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x800);
3435 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x8);
3436 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x8);
3437 BWN_RF_WRITE(mac, BWN_B2062_N_TXCTL_A, 0x80);
3438 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_0, 0x80);
3439 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_VAL_0, 0x80);
3441 bwn_phy_lp_set_rxgain_idx(mac, i);
3442 bwn_phy_lp_ddfs_turnon(mac, 1, 1, 5, 5, 0);
3443 if (!(bwn_phy_lp_rx_iq_est(mac, 1000, 32, &ie)))
3451 bwn_phy_lp_ddfs_turnoff(mac);
3456 bwn_phy_lp_set_rxgain_idx(struct bwn_mac *mac, uint16_t idx)
3459 bwn_phy_lp_set_rxgain(mac, bwn_tab_read(mac, BWN_TAB_2(12, idx)));
3463 bwn_phy_lp_ddfs_turnon(struct bwn_mac *mac, int i_on, int q_on,
3467 bwn_phy_lp_ddfs_turnoff(mac);
3468 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS_POINTER_INIT, 0xff80);
3469 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS_POINTER_INIT, 0x80ff);
3470 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS_INCR_INIT, 0xff80, incr1);
3471 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS_INCR_INIT, 0x80ff, incr2 << 8);
3472 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xfff7, i_on << 3);
3473 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xffef, q_on << 4);
3474 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DDFS, 0xff9f, scale_idx << 5);
3475 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS, 0xfffb);
3476 BWN_PHY_SET(mac, BWN_PHY_AFE_DDFS, 0x2);
3477 BWN_PHY_SET(mac, BWN_PHY_LP_PHY_CTL, 0x20);
3481 bwn_phy_lp_rx_iq_est(struct bwn_mac *mac, uint16_t sample, uint8_t time,
3486 BWN_PHY_MASK(mac, BWN_PHY_CRSGAIN_CTL, 0xfff7);
3487 BWN_PHY_WRITE(mac, BWN_PHY_IQ_NUM_SMPLS_ADDR, sample);
3488 BWN_PHY_SETMASK(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xff00, time);
3489 BWN_PHY_MASK(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xfeff);
3490 BWN_PHY_SET(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR, 0x200);
3493 if (!(BWN_PHY_READ(mac,
3498 if ((BWN_PHY_READ(mac, BWN_PHY_IQ_ENABLE_WAIT_TIME_ADDR) & 0x200)) {
3499 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x8);
3503 ie->ie_iqprod = BWN_PHY_READ(mac, BWN_PHY_IQ_ACC_HI_ADDR);
3505 ie->ie_iqprod |= BWN_PHY_READ(mac, BWN_PHY_IQ_ACC_LO_ADDR);
3506 ie->ie_ipwr = BWN_PHY_READ(mac, BWN_PHY_IQ_I_PWR_ACC_HI_ADDR);
3508 ie->ie_ipwr |= BWN_PHY_READ(mac, BWN_PHY_IQ_I_PWR_ACC_LO_ADDR);
3509 ie->ie_qpwr = BWN_PHY_READ(mac, BWN_PHY_IQ_Q_PWR_ACC_HI_ADDR);
3511 ie->ie_qpwr |= BWN_PHY_READ(mac, BWN_PHY_IQ_Q_PWR_ACC_LO_ADDR);
3513 BWN_PHY_SET(mac, BWN_PHY_CRSGAIN_CTL, 0x8);
3518 bwn_tab_read(struct bwn_mac *mac, uint32_t typeoffset)
3528 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3529 value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO) & 0xff;
3532 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3533 value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO);
3536 BWN_PHY_WRITE(mac, BWN_PHY_TABLE_ADDR, offset);
3537 value = BWN_PHY_READ(mac, BWN_PHY_TABLEDATAHI);
3539 value |= BWN_PHY_READ(mac, BWN_PHY_TABLEDATALO);
3550 bwn_phy_lp_ddfs_turnoff(struct bwn_mac *mac)
3553 BWN_PHY_MASK(mac, BWN_PHY_AFE_DDFS, 0xfffd);
3554 BWN_PHY_MASK(mac, BWN_PHY_LP_PHY_CTL, 0xffdf);
3558 bwn_phy_lp_set_txgain_dac(struct bwn_mac *mac, uint16_t dac)
3562 ctl = BWN_PHY_READ(mac, BWN_PHY_AFE_DAC_CTL) & 0xc7f;
3564 BWN_PHY_SETMASK(mac, BWN_PHY_AFE_DAC_CTL, 0xf000, ctl);
3568 bwn_phy_lp_set_txgain_pa(struct bwn_mac *mac, uint16_t gain)
3571 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfb), 0xe03f, gain << 6);
3572 BWN_PHY_SETMASK(mac, BWN_PHY_OFDM(0xfd), 0x80ff, gain << 8);
3576 bwn_phy_lp_set_txgain_override(struct bwn_mac *mac)
3579 if (mac->mac_phy.rev < 2)
3580 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x100);
3582 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x80);
3583 BWN_PHY_SET(mac, BWN_PHY_RF_OVERRIDE_2, 0x4000);
3585 BWN_PHY_SET(mac, BWN_PHY_AFE_CTL_OVR, 0x40);
3589 bwn_phy_lp_get_pa_gain(struct bwn_mac *mac)
3592 return BWN_PHY_READ(mac, BWN_PHY_OFDM(0xfb)) & 0x7f;
3607 bwn_phy_lp_gaintbl_write_multi(struct bwn_mac *mac, int offset, int count,
3613 bwn_phy_lp_gaintbl_write(mac, i, table[i]);
3617 bwn_phy_lp_gaintbl_write(struct bwn_mac *mac, int offset,
3621 if (mac->mac_phy.rev >= 2)
3622 bwn_phy_lp_gaintbl_write_r2(mac, offset, data);
3624 bwn_phy_lp_gaintbl_write_r01(mac, offset, data);
3628 bwn_phy_lp_gaintbl_write_r2(struct bwn_mac *mac, int offset,
3631 struct bwn_softc *sc = mac->mac_sc;
3635 KASSERT(mac->mac_phy.rev >= 2, ("%s:%d: fail", __func__, __LINE__));
3638 if (mac->mac_phy.rev >= 3) {
3645 bwn_tab_write(mac, BWN_TAB_4(7, 0xc0 + offset), tmp);
3646 bwn_tab_write(mac, BWN_TAB_4(7, 0x140 + offset),
3651 bwn_phy_lp_gaintbl_write_r01(struct bwn_mac *mac, int offset,
3655 KASSERT(mac->mac_phy.rev < 2, ("%s:%d: fail", __func__, __LINE__));
3657 bwn_tab_write(mac, BWN_TAB_4(10, 0xc0 + offset),
3660 bwn_tab_write(mac, BWN_TAB_4(10, 0x140 + offset), te.te_bbmult << 20);