Lines Matching refs:sc
114 static void bfe_get_config (struct bfe_softc *sc);
127 static void bfe_dma_free (struct bfe_softc *sc);
187 bfe_dma_alloc(struct bfe_softc *sc)
198 error = bus_dma_tag_create(bus_get_dma_tag(sc->bfe_dev), /* parent */
208 &sc->bfe_parent_tag);
210 device_printf(sc->bfe_dev, "cannot create parent DMA tag.\n");
215 error = bus_dma_tag_create(sc->bfe_parent_tag, /* parent */
225 &sc->bfe_tx_tag);
227 device_printf(sc->bfe_dev, "cannot create Tx ring DMA tag.\n");
232 error = bus_dma_tag_create(sc->bfe_parent_tag, /* parent */
242 &sc->bfe_rx_tag);
244 device_printf(sc->bfe_dev, "cannot create Rx ring DMA tag.\n");
249 error = bus_dma_tag_create(sc->bfe_parent_tag, /* parent */
259 &sc->bfe_txmbuf_tag);
261 device_printf(sc->bfe_dev,
267 error = bus_dma_tag_create(sc->bfe_parent_tag, /* parent */
277 &sc->bfe_rxmbuf_tag);
279 device_printf(sc->bfe_dev,
285 error = bus_dmamem_alloc(sc->bfe_tx_tag, (void *)&sc->bfe_tx_list,
286 BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_COHERENT, &sc->bfe_tx_map);
288 device_printf(sc->bfe_dev,
293 error = bus_dmamap_load(sc->bfe_tx_tag, sc->bfe_tx_map,
294 sc->bfe_tx_list, BFE_TX_LIST_SIZE, bfe_dma_map, &ctx,
297 device_printf(sc->bfe_dev,
301 sc->bfe_tx_dma = BFE_ADDR_LO(ctx.bfe_busaddr);
303 error = bus_dmamem_alloc(sc->bfe_rx_tag, (void *)&sc->bfe_rx_list,
304 BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_COHERENT, &sc->bfe_rx_map);
306 device_printf(sc->bfe_dev,
311 error = bus_dmamap_load(sc->bfe_rx_tag, sc->bfe_rx_map,
312 sc->bfe_rx_list, BFE_RX_LIST_SIZE, bfe_dma_map, &ctx,
315 device_printf(sc->bfe_dev,
319 sc->bfe_rx_dma = BFE_ADDR_LO(ctx.bfe_busaddr);
323 td = &sc->bfe_tx_ring[i];
326 error = bus_dmamap_create(sc->bfe_txmbuf_tag, 0, &td->bfe_map);
328 device_printf(sc->bfe_dev,
335 error = bus_dmamap_create(sc->bfe_rxmbuf_tag, 0, &sc->bfe_rx_sparemap);
337 device_printf(sc->bfe_dev, "cannot create spare DMA map for Rx.\n");
342 rd = &sc->bfe_rx_ring[i];
346 error = bus_dmamap_create(sc->bfe_rxmbuf_tag, 0, &rd->bfe_map);
348 device_printf(sc->bfe_dev,
359 bfe_dma_free(struct bfe_softc *sc)
366 if (sc->bfe_tx_tag != NULL) {
367 if (sc->bfe_tx_dma != 0)
368 bus_dmamap_unload(sc->bfe_tx_tag, sc->bfe_tx_map);
369 if (sc->bfe_tx_list != NULL)
370 bus_dmamem_free(sc->bfe_tx_tag, sc->bfe_tx_list,
371 sc->bfe_tx_map);
372 sc->bfe_tx_dma = 0;
373 sc->bfe_tx_list = NULL;
374 bus_dma_tag_destroy(sc->bfe_tx_tag);
375 sc->bfe_tx_tag = NULL;
379 if (sc->bfe_rx_tag != NULL) {
380 if (sc->bfe_rx_dma != 0)
381 bus_dmamap_unload(sc->bfe_rx_tag, sc->bfe_rx_map);
382 if (sc->bfe_rx_list != NULL)
383 bus_dmamem_free(sc->bfe_rx_tag, sc->bfe_rx_list,
384 sc->bfe_rx_map);
385 sc->bfe_rx_dma = 0;
386 sc->bfe_rx_list = NULL;
387 bus_dma_tag_destroy(sc->bfe_rx_tag);
388 sc->bfe_rx_tag = NULL;
392 if (sc->bfe_txmbuf_tag != NULL) {
394 td = &sc->bfe_tx_ring[i];
396 bus_dmamap_destroy(sc->bfe_txmbuf_tag,
401 bus_dma_tag_destroy(sc->bfe_txmbuf_tag);
402 sc->bfe_txmbuf_tag = NULL;
406 if (sc->bfe_rxmbuf_tag != NULL) {
408 rd = &sc->bfe_rx_ring[i];
410 bus_dmamap_destroy(sc->bfe_rxmbuf_tag,
415 if (sc->bfe_rx_sparemap != NULL) {
416 bus_dmamap_destroy(sc->bfe_rxmbuf_tag,
417 sc->bfe_rx_sparemap);
418 sc->bfe_rx_sparemap = NULL;
420 bus_dma_tag_destroy(sc->bfe_rxmbuf_tag);
421 sc->bfe_rxmbuf_tag = NULL;
424 if (sc->bfe_parent_tag != NULL) {
425 bus_dma_tag_destroy(sc->bfe_parent_tag);
426 sc->bfe_parent_tag = NULL;
434 struct bfe_softc *sc;
437 sc = device_get_softc(dev);
438 mtx_init(&sc->bfe_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
440 callout_init_mtx(&sc->bfe_stat_co, &sc->bfe_mtx, 0);
442 sc->bfe_dev = dev;
450 sc->bfe_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
452 if (sc->bfe_res == NULL) {
461 sc->bfe_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
463 if (sc->bfe_irq == NULL) {
469 if (bfe_dma_alloc(sc) != 0) {
477 "stats", CTLTYPE_INT | CTLFLAG_RW, sc, 0, sysctl_bfe_stats,
481 ifp = sc->bfe_ifp = if_alloc(IFT_ETHER);
487 ifp->if_softc = sc;
497 bfe_get_config(sc);
500 BFE_LOCK(sc);
501 bfe_chip_reset(sc);
502 BFE_UNLOCK(sc);
504 error = mii_attach(dev, &sc->bfe_miibus, ifp, bfe_ifmedia_upd,
505 bfe_ifmedia_sts, BMSR_DEFCAPMASK, sc->bfe_phyaddr, MII_OFFSET_ANY,
512 ether_ifattach(ifp, sc->bfe_enaddr);
524 error = bus_setup_intr(dev, sc->bfe_irq, INTR_TYPE_NET | INTR_MPSAFE,
525 NULL, bfe_intr, sc, &sc->bfe_intrhand);
540 struct bfe_softc *sc;
543 sc = device_get_softc(dev);
545 ifp = sc->bfe_ifp;
548 BFE_LOCK(sc);
549 sc->bfe_flags |= BFE_FLAG_DETACH;
550 bfe_stop(sc);
551 BFE_UNLOCK(sc);
552 callout_drain(&sc->bfe_stat_co);
557 BFE_LOCK(sc);
558 bfe_chip_reset(sc);
559 BFE_UNLOCK(sc);
562 if (sc->bfe_miibus != NULL)
563 device_delete_child(dev, sc->bfe_miibus);
565 bfe_release_resources(sc);
566 bfe_dma_free(sc);
567 mtx_destroy(&sc->bfe_mtx);
579 struct bfe_softc *sc;
581 sc = device_get_softc(dev);
582 BFE_LOCK(sc);
583 bfe_stop(sc);
585 BFE_UNLOCK(sc);
593 struct bfe_softc *sc;
595 sc = device_get_softc(dev);
596 BFE_LOCK(sc);
597 bfe_stop(sc);
598 BFE_UNLOCK(sc);
606 struct bfe_softc *sc;
609 sc = device_get_softc(dev);
610 ifp = sc->bfe_ifp;
611 BFE_LOCK(sc);
612 bfe_chip_reset(sc);
614 bfe_init_locked(sc);
619 BFE_UNLOCK(sc);
627 struct bfe_softc *sc;
630 sc = device_get_softc(dev);
631 bfe_readphy(sc, reg, &ret);
639 struct bfe_softc *sc;
641 sc = device_get_softc(dev);
642 bfe_writephy(sc, reg, val);
650 struct bfe_softc *sc;
654 sc = device_get_softc(dev);
655 mii = device_get_softc(sc->bfe_miibus);
657 sc->bfe_flags &= ~BFE_FLAG_LINK;
663 sc->bfe_flags |= BFE_FLAG_LINK;
671 val = CSR_READ_4(sc, BFE_TX_CTRL);
677 flow = CSR_READ_4(sc, BFE_RXCONF);
679 if ((IFM_OPTIONS(sc->sc_mii->mii_media_active) &
682 CSR_WRITE_4(sc, BFE_RXCONF, flow);
687 flow = CSR_READ_4(sc, BFE_MAC_FLOW);
689 CSR_WRITE_4(sc, BFE_MAC_FLOW, flow);
692 CSR_WRITE_4(sc, BFE_TX_CTRL, val);
696 bfe_tx_ring_free(struct bfe_softc *sc)
701 if (sc->bfe_tx_ring[i].bfe_mbuf != NULL) {
702 bus_dmamap_sync(sc->bfe_txmbuf_tag,
703 sc->bfe_tx_ring[i].bfe_map, BUS_DMASYNC_POSTWRITE);
704 bus_dmamap_unload(sc->bfe_txmbuf_tag,
705 sc->bfe_tx_ring[i].bfe_map);
706 m_freem(sc->bfe_tx_ring[i].bfe_mbuf);
707 sc->bfe_tx_ring[i].bfe_mbuf = NULL;
710 bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE);
711 bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map,
716 bfe_rx_ring_free(struct bfe_softc *sc)
721 if (sc->bfe_rx_ring[i].bfe_mbuf != NULL) {
722 bus_dmamap_sync(sc->bfe_rxmbuf_tag,
723 sc->bfe_rx_ring[i].bfe_map, BUS_DMASYNC_POSTREAD);
724 bus_dmamap_unload(sc->bfe_rxmbuf_tag,
725 sc->bfe_rx_ring[i].bfe_map);
726 m_freem(sc->bfe_rx_ring[i].bfe_mbuf);
727 sc->bfe_rx_ring[i].bfe_mbuf = NULL;
730 bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE);
731 bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map,
736 bfe_list_rx_init(struct bfe_softc *sc)
741 sc->bfe_rx_prod = sc->bfe_rx_cons = 0;
742 bzero(sc->bfe_rx_list, BFE_RX_LIST_SIZE);
744 rd = &sc->bfe_rx_ring[i];
747 if (bfe_list_newbuf(sc, i) != 0)
751 bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map,
753 CSR_WRITE_4(sc, BFE_DMARX_PTR, (i * sizeof(struct bfe_desc)));
759 bfe_list_tx_init(struct bfe_softc *sc)
763 sc->bfe_tx_cnt = sc->bfe_tx_prod = sc->bfe_tx_cons = 0;
764 bzero(sc->bfe_tx_list, BFE_TX_LIST_SIZE);
766 sc->bfe_tx_ring[i].bfe_mbuf = NULL;
768 bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map,
773 bfe_discard_buf(struct bfe_softc *sc, int c)
778 r = &sc->bfe_rx_ring[c];
779 d = &sc->bfe_rx_list[c];
784 bfe_list_newbuf(struct bfe_softc *sc, int c)
798 if (bus_dmamap_load_mbuf_sg(sc->bfe_rxmbuf_tag, sc->bfe_rx_sparemap,
805 r = &sc->bfe_rx_ring[c];
807 bus_dmamap_sync(sc->bfe_rxmbuf_tag, r->bfe_map,
809 bus_dmamap_unload(sc->bfe_rxmbuf_tag, r->bfe_map);
812 r->bfe_map = sc->bfe_rx_sparemap;
813 sc->bfe_rx_sparemap = map;
819 bus_dmamap_sync(sc->bfe_rxmbuf_tag, r->bfe_map, BUS_DMASYNC_PREREAD);
828 d = &sc->bfe_rx_list[c];
837 bfe_get_config(struct bfe_softc *sc)
841 bfe_read_eeprom(sc, eeprom);
843 sc->bfe_enaddr[0] = eeprom[79];
844 sc->bfe_enaddr[1] = eeprom[78];
845 sc->bfe_enaddr[2] = eeprom[81];
846 sc->bfe_enaddr[3] = eeprom[80];
847 sc->bfe_enaddr[4] = eeprom[83];
848 sc->bfe_enaddr[5] = eeprom[82];
850 sc->bfe_phyaddr = eeprom[90] & 0x1f;
851 sc->bfe_mdc_port = (eeprom[90] >> 14) & 0x1;
853 sc->bfe_core_unit = 0;
854 sc->bfe_dma_offset = BFE_PCI_DMA;
858 bfe_pci_setup(struct bfe_softc *sc, u_int32_t cores)
862 bar_orig = pci_read_config(sc->bfe_dev, BFE_BAR0_WIN, 4);
863 pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, BFE_REG_PCI, 4);
864 pci_rev = CSR_READ_4(sc, BFE_SBIDHIGH) & BFE_RC_MASK;
866 val = CSR_READ_4(sc, BFE_SBINTVEC);
868 CSR_WRITE_4(sc, BFE_SBINTVEC, val);
870 val = CSR_READ_4(sc, BFE_SSB_PCI_TRANS_2);
872 CSR_WRITE_4(sc, BFE_SSB_PCI_TRANS_2, val);
874 pci_write_config(sc->bfe_dev, BFE_BAR0_WIN, bar_orig, 4);
878 bfe_clear_stats(struct bfe_softc *sc)
882 BFE_LOCK_ASSERT(sc);
884 CSR_WRITE_4(sc, BFE_MIB_CTRL, BFE_MIB_CLR_ON_READ);
886 CSR_READ_4(sc, reg);
888 CSR_READ_4(sc, reg);
892 bfe_resetphy(struct bfe_softc *sc)
896 bfe_writephy(sc, 0, BMCR_RESET);
898 bfe_readphy(sc, 0, &val);
900 device_printf(sc->bfe_dev, "PHY Reset would not complete.\n");
907 bfe_chip_halt(struct bfe_softc *sc)
909 BFE_LOCK_ASSERT(sc);
911 CSR_WRITE_4(sc, BFE_IMASK, 0);
912 CSR_READ_4(sc, BFE_IMASK);
914 CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE);
915 bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 200, 1);
917 CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0);
918 CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0);
923 bfe_chip_reset(struct bfe_softc *sc)
927 BFE_LOCK_ASSERT(sc);
930 bfe_pci_setup(sc, BFE_INTVEC_ENET0);
933 val = CSR_READ_4(sc, BFE_SBTMSLOW) &
937 CSR_WRITE_4(sc, BFE_RCV_LAZY, 0);
938 CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE);
939 bfe_wait_bit(sc, BFE_ENET_CTRL, BFE_ENET_DISABLE, 100, 1);
940 CSR_WRITE_4(sc, BFE_DMATX_CTRL, 0);
941 if (CSR_READ_4(sc, BFE_DMARX_STAT) & BFE_STAT_EMASK)
942 bfe_wait_bit(sc, BFE_DMARX_STAT, BFE_STAT_SIDLE,
944 CSR_WRITE_4(sc, BFE_DMARX_CTRL, 0);
947 bfe_core_reset(sc);
948 bfe_clear_stats(sc);
957 CSR_WRITE_4(sc, BFE_MDIO_CTRL, 0x8d);
960 val = CSR_READ_4(sc, BFE_DEVCTRL);
962 CSR_WRITE_4(sc, BFE_ENET_CTRL, BFE_ENET_EPSEL);
963 else if (CSR_READ_4(sc, BFE_DEVCTRL) & BFE_EPR) {
964 BFE_AND(sc, BFE_DEVCTRL, ~BFE_EPR);
969 BFE_OR(sc, BFE_MAC_CTRL, BFE_CTRL_CRC32_ENAB | BFE_CTRL_LED);
972 BFE_AND(sc, BFE_MAC_CTRL, ~BFE_CTRL_PDOWN);
974 CSR_WRITE_4(sc, BFE_RCV_LAZY, ((1 << BFE_LAZY_FC_SHIFT) &
981 BFE_OR(sc, BFE_RCV_LAZY, 0);
984 CSR_WRITE_4(sc, BFE_RXMAXLEN, ETHER_MAX_LEN+32);
985 CSR_WRITE_4(sc, BFE_TXMAXLEN, ETHER_MAX_LEN+32);
988 CSR_WRITE_4(sc, BFE_TX_WMARK, 56);
994 CSR_WRITE_4(sc, BFE_DMATX_CTRL, BFE_TX_CTRL_ENABLE);
995 CSR_WRITE_4(sc, BFE_DMATX_ADDR, sc->bfe_tx_dma + BFE_PCI_DMA);
997 CSR_WRITE_4(sc, BFE_DMARX_CTRL, (BFE_RX_OFFSET << BFE_RX_CTRL_ROSHIFT) |
999 CSR_WRITE_4(sc, BFE_DMARX_ADDR, sc->bfe_rx_dma + BFE_PCI_DMA);
1001 bfe_resetphy(sc);
1002 bfe_setupphy(sc);
1006 bfe_core_disable(struct bfe_softc *sc)
1008 if ((CSR_READ_4(sc, BFE_SBTMSLOW)) & BFE_RESET)
1015 CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_CLOCK));
1016 bfe_wait_bit(sc, BFE_SBTMSLOW, BFE_REJECT, 1000, 0);
1017 bfe_wait_bit(sc, BFE_SBTMSHIGH, BFE_BUSY, 1000, 1);
1018 CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_FGC | BFE_CLOCK | BFE_REJECT |
1020 CSR_READ_4(sc, BFE_SBTMSLOW);
1023 CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_REJECT | BFE_RESET));
1028 bfe_core_reset(struct bfe_softc *sc)
1033 bfe_core_disable(sc);
1036 CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_RESET | BFE_CLOCK | BFE_FGC));
1037 CSR_READ_4(sc, BFE_SBTMSLOW);
1041 if (CSR_READ_4(sc, BFE_SBTMSHIGH) & BFE_SERR)
1042 CSR_WRITE_4(sc, BFE_SBTMSHIGH, 0);
1043 val = CSR_READ_4(sc, BFE_SBIMSTATE);
1045 CSR_WRITE_4(sc, BFE_SBIMSTATE, val & ~(BFE_IBE | BFE_TO));
1048 CSR_WRITE_4(sc, BFE_SBTMSLOW, (BFE_CLOCK | BFE_FGC));
1049 CSR_READ_4(sc, BFE_SBTMSLOW);
1053 CSR_WRITE_4(sc, BFE_SBTMSLOW, BFE_CLOCK);
1054 CSR_READ_4(sc, BFE_SBTMSLOW);
1059 bfe_cam_write(struct bfe_softc *sc, u_char *data, int index)
1067 CSR_WRITE_4(sc, BFE_CAM_DATA_LO, val);
1071 CSR_WRITE_4(sc, BFE_CAM_DATA_HI, val);
1072 CSR_WRITE_4(sc, BFE_CAM_CTRL, (BFE_CAM_WRITE |
1074 bfe_wait_bit(sc, BFE_CAM_CTRL, BFE_CAM_BUSY, 10000, 1);
1078 bfe_set_rx_mode(struct bfe_softc *sc)
1080 struct ifnet *ifp = sc->bfe_ifp;
1085 BFE_LOCK_ASSERT(sc);
1087 val = CSR_READ_4(sc, BFE_RXCONF);
1100 CSR_WRITE_4(sc, BFE_CAM_CTRL, 0);
1101 bfe_cam_write(sc, IF_LLADDR(sc->bfe_ifp), i++);
1111 bfe_cam_write(sc,
1117 CSR_WRITE_4(sc, BFE_RXCONF, val);
1118 BFE_OR(sc, BFE_CAM_CTRL, BFE_CAM_ENABLE);
1136 bfe_release_resources(struct bfe_softc *sc)
1139 if (sc->bfe_intrhand != NULL)
1140 bus_teardown_intr(sc->bfe_dev, sc->bfe_irq, sc->bfe_intrhand);
1142 if (sc->bfe_irq != NULL)
1143 bus_release_resource(sc->bfe_dev, SYS_RES_IRQ, 0, sc->bfe_irq);
1145 if (sc->bfe_res != NULL)
1146 bus_release_resource(sc->bfe_dev, SYS_RES_MEMORY, PCIR_BAR(0),
1147 sc->bfe_res);
1149 if (sc->bfe_ifp != NULL)
1150 if_free(sc->bfe_ifp);
1154 bfe_read_eeprom(struct bfe_softc *sc, u_int8_t *data)
1160 ptr[i/2] = CSR_READ_4(sc, 4096 + i);
1164 bfe_wait_bit(struct bfe_softc *sc, u_int32_t reg, u_int32_t bit,
1170 u_int32_t val = CSR_READ_4(sc, reg);
1179 device_printf(sc->bfe_dev,
1188 bfe_readphy(struct bfe_softc *sc, u_int32_t reg, u_int32_t *val)
1193 CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII);
1194 CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START |
1196 (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) |
1199 err = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0);
1200 *val = CSR_READ_4(sc, BFE_MDIO_DATA) & BFE_MDIO_DATA_DATA;
1206 bfe_writephy(struct bfe_softc *sc, u_int32_t reg, u_int32_t val)
1210 CSR_WRITE_4(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII);
1211 CSR_WRITE_4(sc, BFE_MDIO_DATA, (BFE_MDIO_SB_START |
1213 (sc->bfe_phyaddr << BFE_MDIO_PMD_SHIFT) |
1217 status = bfe_wait_bit(sc, BFE_EMAC_ISTAT, BFE_EMAC_INT_MII, 100, 0);
1227 bfe_setupphy(struct bfe_softc *sc)
1232 bfe_readphy(sc, 26, &val);
1233 bfe_writephy(sc, 26, val & 0x7fff);
1234 bfe_readphy(sc, 26, &val);
1237 bfe_readphy(sc, 27, &val);
1238 bfe_writephy(sc, 27, val | (1 << 6));
1244 bfe_stats_update(struct bfe_softc *sc)
1251 BFE_LOCK_ASSERT(sc);
1254 CSR_WRITE_4(sc, BFE_MIB_CTRL, BFE_MIB_CLR_ON_READ);
1256 *val++ = CSR_READ_4(sc, reg);
1258 *val++ = CSR_READ_4(sc, reg);
1260 ifp = sc->bfe_ifp;
1261 stats = &sc->bfe_stats;
1332 bfe_txeof(struct bfe_softc *sc)
1338 BFE_LOCK_ASSERT(sc);
1340 ifp = sc->bfe_ifp;
1342 chipidx = CSR_READ_4(sc, BFE_DMATX_STAT) & BFE_STAT_CDMASK;
1345 i = sc->bfe_tx_cons;
1348 bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map,
1352 r = &sc->bfe_tx_ring[i];
1353 sc->bfe_tx_cnt--;
1356 bus_dmamap_sync(sc->bfe_txmbuf_tag, r->bfe_map,
1358 bus_dmamap_unload(sc->bfe_txmbuf_tag, r->bfe_map);
1364 if (i != sc->bfe_tx_cons) {
1366 sc->bfe_tx_cons = i;
1370 if (sc->bfe_tx_cnt == 0)
1371 sc->bfe_watchdog_timer = 0;
1376 bfe_rxeof(struct bfe_softc *sc)
1385 BFE_LOCK_ASSERT(sc);
1386 cons = sc->bfe_rx_cons;
1387 status = CSR_READ_4(sc, BFE_DMARX_STAT);
1390 ifp = sc->bfe_ifp;
1392 bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map,
1397 r = &sc->bfe_rx_ring[cons];
1405 if (bfe_list_newbuf(sc, cons) != 0) {
1407 bfe_discard_buf(sc, cons);
1428 BFE_UNLOCK(sc);
1430 BFE_LOCK(sc);
1434 sc->bfe_rx_cons = cons;
1435 bus_dmamap_sync(sc->bfe_rx_tag, sc->bfe_rx_map,
1443 struct bfe_softc *sc = xsc;
1447 ifp = sc->bfe_ifp;
1449 BFE_LOCK(sc);
1451 istat = CSR_READ_4(sc, BFE_ISTAT);
1459 CSR_WRITE_4(sc, BFE_ISTAT, istat);
1460 CSR_READ_4(sc, BFE_ISTAT);
1464 BFE_UNLOCK(sc);
1470 bfe_rxeof(sc);
1474 bfe_txeof(sc);
1479 device_printf(sc->bfe_dev, "Descriptor Error\n");
1480 bfe_stop(sc);
1481 BFE_UNLOCK(sc);
1486 device_printf(sc->bfe_dev,
1488 bfe_stop(sc);
1489 BFE_UNLOCK(sc);
1493 bfe_init_locked(sc);
1500 BFE_UNLOCK(sc);
1504 bfe_encap(struct bfe_softc *sc, struct mbuf **m_head)
1514 BFE_LOCK_ASSERT(sc);
1518 si = cur = sc->bfe_tx_prod;
1519 r = &sc->bfe_tx_ring[cur];
1520 error = bus_dmamap_load_mbuf_sg(sc->bfe_txmbuf_tag, r->bfe_map, *m_head,
1530 error = bus_dmamap_load_mbuf_sg(sc->bfe_txmbuf_tag, r->bfe_map,
1545 if (sc->bfe_tx_cnt + nsegs > BFE_TX_LIST_CNT - 1) {
1546 bus_dmamap_unload(sc->bfe_txmbuf_tag, r->bfe_map);
1551 d = &sc->bfe_tx_list[cur];
1567 sc->bfe_tx_prod = cur;
1571 d = &sc->bfe_tx_list[cur];
1575 d = &sc->bfe_tx_list[si];
1578 r1 = &sc->bfe_tx_ring[cur];
1583 sc->bfe_tx_cnt += nsegs;
1585 bus_dmamap_sync(sc->bfe_txmbuf_tag, map, BUS_DMASYNC_PREWRITE);
1607 struct bfe_softc *sc;
1611 sc = ifp->if_softc;
1613 BFE_LOCK_ASSERT(sc);
1620 IFF_DRV_RUNNING || (sc->bfe_flags & BFE_FLAG_LINK) == 0)
1624 sc->bfe_tx_cnt < BFE_TX_LIST_CNT - 1;) {
1633 if (bfe_encap(sc, &m_head)) {
1651 bus_dmamap_sync(sc->bfe_tx_tag, sc->bfe_tx_map,
1654 CSR_WRITE_4(sc, BFE_DMATX_PTR,
1655 sc->bfe_tx_prod * sizeof(struct bfe_desc));
1667 CSR_WRITE_4(sc, BFE_DMATX_PTR,
1668 sc->bfe_tx_prod * sizeof(struct bfe_desc));
1673 sc->bfe_watchdog_timer = 5;
1688 struct bfe_softc *sc = (struct bfe_softc*)xsc;
1689 struct ifnet *ifp = sc->bfe_ifp;
1692 BFE_LOCK_ASSERT(sc);
1694 mii = device_get_softc(sc->bfe_miibus);
1699 bfe_stop(sc);
1700 bfe_chip_reset(sc);
1702 if (bfe_list_rx_init(sc) == ENOBUFS) {
1703 device_printf(sc->bfe_dev,
1705 bfe_stop(sc);
1708 bfe_list_tx_init(sc);
1710 bfe_set_rx_mode(sc);
1713 BFE_OR(sc, BFE_ENET_CTRL, BFE_ENET_ENABLE);
1715 CSR_WRITE_4(sc, BFE_IMASK, BFE_IMASK_DEF);
1718 sc->bfe_flags &= ~BFE_FLAG_LINK;
1724 callout_reset(&sc->bfe_stat_co, hz, bfe_tick, sc);
1733 struct bfe_softc *sc;
1738 sc = ifp->if_softc;
1739 BFE_LOCK(sc);
1741 mii = device_get_softc(sc->bfe_miibus);
1745 BFE_UNLOCK(sc);
1756 struct bfe_softc *sc = ifp->if_softc;
1759 BFE_LOCK(sc);
1760 mii = device_get_softc(sc->bfe_miibus);
1764 BFE_UNLOCK(sc);
1770 struct bfe_softc *sc = ifp->if_softc;
1777 BFE_LOCK(sc);
1780 bfe_set_rx_mode(sc);
1781 else if ((sc->bfe_flags & BFE_FLAG_DETACH) == 0)
1782 bfe_init_locked(sc);
1784 bfe_stop(sc);
1785 BFE_UNLOCK(sc);
1789 BFE_LOCK(sc);
1791 bfe_set_rx_mode(sc);
1792 BFE_UNLOCK(sc);
1796 mii = device_get_softc(sc->bfe_miibus);
1808 bfe_watchdog(struct bfe_softc *sc)
1812 BFE_LOCK_ASSERT(sc);
1814 if (sc->bfe_watchdog_timer == 0 || --sc->bfe_watchdog_timer)
1817 ifp = sc->bfe_ifp;
1819 device_printf(sc->bfe_dev, "watchdog timeout -- resetting\n");
1823 bfe_init_locked(sc);
1832 struct bfe_softc *sc = xsc;
1835 BFE_LOCK_ASSERT(sc);
1837 mii = device_get_softc(sc->bfe_miibus);
1839 bfe_stats_update(sc);
1840 bfe_watchdog(sc);
1841 callout_reset(&sc->bfe_stat_co, hz, bfe_tick, sc);
1849 bfe_stop(struct bfe_softc *sc)
1853 BFE_LOCK_ASSERT(sc);
1855 ifp = sc->bfe_ifp;
1857 sc->bfe_flags &= ~BFE_FLAG_LINK;
1858 callout_stop(&sc->bfe_stat_co);
1859 sc->bfe_watchdog_timer = 0;
1861 bfe_chip_halt(sc);
1862 bfe_tx_ring_free(sc);
1863 bfe_rx_ring_free(sc);
1869 struct bfe_softc *sc;
1882 sc = (struct bfe_softc *)arg1;
1883 stats = &sc->bfe_stats;
1885 printf("%s statistics:\n", device_get_nameunit(sc->bfe_dev));