ath_hal/ar9001/ar9160_attach.c

21 #include "ah.h"
60 static HAL_BOOL ar9160FillCapabilityInfo(struct ath_hal *ah);
63 ar9160AniSetup(struct ath_hal *ah)
85 	AH5416(ah)->ah_ani_function &= ~(1 << HAL_ANI_NOISE_IMMUNITY_LEVEL);
86 	ar5416AniAttach(ah, &aniparams, &aniparams, AH_TRUE);
90 ar9160InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
106 	OS_REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
108 	OS_REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_SLEEP_DERIVED_CLK);
122 	struct ath_hal *ah;
140 	ah = &ahp->ah_priv.h;
144 	AH5416(ah)->ah_initPLL = ar9160InitPLL;
146 	AH5416(ah)->ah_cal.iqCalData.calData = &ar9160_iq_cal;
147 	AH5416(ah)->ah_cal.adcGainCalData.calData = &ar9160_adc_gain_cal;
148 	AH5416(ah)->ah_cal.adcDcCalData.calData = &ar9160_adc_dc_cal;
149 	AH5416(ah)->ah_cal.adcDcCalInitData.calData = &ar9160_adc_init_dc_cal;
150 	AH5416(ah)->ah_cal.suppCals = ADC_GAIN_CAL | ADC_DC_CAL | IQ_MISMATCH_CAL;
152 	if (!ar5416SetResetReg(ah, HAL_RESET_POWER_ON)) {
154 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't reset chip\n",
160 	if (!ar5416SetPowerMode(ah, HAL_PM_AWAKE, AH_TRUE)) {
161 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: couldn't wakeup chip\n",
167 	val = OS_REG_READ(ah, AR_SREV);
168 	HALDEBUG(ah, HAL_DEBUG_ATTACH,
173 	AH_PRIVATE(ah)->ah_macVersion =
175 	AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
176 	AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;
182 	HAL_INI_INIT(&AH5416(ah)->ah_ini_bb_rfgain, ar9160BB_RfGain, 3);
183 	HAL_INI_INIT(&AH5416(ah)->ah_ini_bank0, ar9160Bank0, 2);
184 	HAL_INI_INIT(&AH5416(ah)->ah_ini_bank1, ar9160Bank1, 2);
185 	HAL_INI_INIT(&AH5416(ah)->ah_ini_bank2, ar9160Bank2, 2);
186 	HAL_INI_INIT(&AH5416(ah)->ah_ini_bank3, ar9160Bank3, 3);
187 	HAL_INI_INIT(&AH5416(ah)->ah_ini_bank6, ar9160Bank6TPC, 3);
188 	HAL_INI_INIT(&AH5416(ah)->ah_ini_bank7, ar9160Bank7, 2);
189 	if (AR_SREV_SOWL_11(ah))
190 		HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac_1_1, 2);
192 		HAL_INI_INIT(&AH5416(ah)->ah_ini_addac, ar9160Addac, 2);
194 	ecode = ath_hal_v14EepromAttach(ah);
198 	HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, ar9160PciePhy, 2);
199 	ar5416AttachPCIE(ah);
201 	if (!ar5416ChipReset(ah, AH_NULL)) {	/* reset chip */
202 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
207 	AH_PRIVATE(ah)->ah_phyRev = OS_REG_READ(ah, AR_PHY_CHIP_ID);
209 	if (!ar5212ChipTest(ah)) {
210 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: hardware self-test failed\n",
220 	OS_REG_WRITE(ah, AR_PHY(0), 0x00000007);
223 	AH_PRIVATE(ah)->ah_analog5GhzRev = ar5416GetRadioRev(ah);
224 	switch (AH_PRIVATE(ah)->ah_analog5GhzRev & AR_RADIO_SREV_MAJOR) {
229 		if (AH_PRIVATE(ah)->ah_analog5GhzRev == 0) {
230 			AH_PRIVATE(ah)->ah_analog5GhzRev =
235 		HALDEBUG(ah, HAL_DEBUG_ANY,
238 		    AH_PRIVATE(ah)->ah_analog5GhzRev);
243 	rfStatus = ar2133RfAttach(ah, &ecode);
245 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: RF setup failed, status %u\n",
253 	if (!ar9160FillCapabilityInfo(ah)) {
258 	ecode = ath_hal_eepromGet(ah, AR_EEP_MACADDR, ahp->ah_macaddr);
260 		HALDEBUG(ah, HAL_DEBUG_ANY,
266 	AH_PRIVATE(ah)->ah_currentRD =
267 	    ath_hal_eepromGet(ah, AR_EEP_REGDMN_0, AH_NULL);
268 	AH_PRIVATE(ah)->ah_currentRDext =
269 	    ath_hal_eepromGet(ah, AR_EEP_REGDMN_1, AH_NULL);
278 		OS_REG_WRITE(ah, AR_MISC_MODE, OS_REG_READ(ah, AR_MISC_MODE) | ahp->ah_miscMode);
280 	ar9160AniSetup(ah);			/* Anti Noise Immunity */
283 	AH5416(ah)->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_2GHZ;
284 	AH5416(ah)->nf_2g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_2GHZ;
285 	AH5416(ah)->nf_2g.nominal = AR_PHY_CCA_NOM_VAL_5416_2GHZ;
286 	AH5416(ah)->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_5416_5GHZ;
287 	AH5416(ah)->nf_5g.min = AR_PHY_CCA_MIN_GOOD_VAL_5416_5GHZ;
288 	AH5416(ah)->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ;
290 	ar5416InitNfHistBuff(AH5416(ah)->ah_cal.nfCalHist);
292 	HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: return\n", __func__);
294 	return ah;
309 ar9160FillCapabilityInfo(struct ath_hal *ah)
311 	HAL_CAPABILITIES *pCap = &AH_PRIVATE(ah)->ah_caps;
313 	if (!ar5416FillCapabilityInfo(ah))