ata/chipsets/ata-promise.c

370     struct ata_channel *ch = device_get_softc(dev);
376         ch->dma.start = ata_promise_dmastart;
377         ch->dma.stop = ata_promise_dmastop;
378         ch->dma.reset = ata_promise_dmareset;
381     ch->hw.status = ata_promise_status;
382     ch->flags |= ATA_NO_ATAPI_DMA;
383     ch->flags |= ATA_CHECKS_CABLE;
391     struct ata_channel *ch = device_get_softc(dev);
393     if (ATA_INL(ctlr->r_res1, 0x1c) & (ch->unit ? 0x00004000 : 0x00000400)) {
403     struct ata_channel *ch = device_get_softc(request->parent);
407 		 ATA_INB(ctlr->r_res1, 0x11) | (ch->unit ? 0x08 : 0x02));
408 	ATA_OUTL(ctlr->r_res1, ch->unit ? 0x24 : 0x20,
412     ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) |
414     ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, request->dma->sg_bus);
415     ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
418     ch->dma.flags |= ATA_DMA_ACTIVE;
426     struct ata_channel *ch = device_get_softc(request->parent);
431 		 ATA_INB(ctlr->r_res1, 0x11) & ~(ch->unit ? 0x08 : 0x02));
432 	ATA_OUTL(ctlr->r_res1, ch->unit ? 0x24 : 0x20, 0);
434     error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT);
435     ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
436 		 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
437     ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
438     ch->dma.flags &= ~ATA_DMA_ACTIVE;
445     struct ata_channel *ch = device_get_softc(dev);
447     ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
448 		 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP);
449     ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR);
450     ch->flags &= ~ATA_DMA_ACTIVE;
458     struct ata_channel *ch = device_get_softc(dev);
459     int devno = (ch->unit << 1) + target;
485 				 (ch->unit ? 1 << 11 : 1 << 10))) {
492 	ATA_IDX_OUTB(ch, ATA_BMDEVSPEC_0, 0x0b);
494 	    ATA_IDX_INB(ch, ATA_BMDEVSPEC_1) & 0x04) {
504 		     (ch->unit << 7)) & 0x01000000)) {
520     struct ata_channel *ch = device_get_softc(dev);
525     ch->hw.status = ata_promise_tx2_status;
526     ch->flags |= ATA_CHECKS_CABLE;
533     struct ata_channel *ch = device_get_softc(dev);
535     ATA_IDX_OUTB(ch, ATA_BMDEVSPEC_0, 0x0b);
536     if (ATA_IDX_INB(ch, ATA_BMDEVSPEC_1) & 0x20) {
546     struct ata_channel *ch = device_get_softc(dev);
553 	ch->r_io[i].res = ctlr->r_res2;
554 	ch->r_io[i].offset = offset + 0x0200 + (i << 2) + (ch->unit << 7);
556     ch->r_io[ATA_CONTROL].res = ctlr->r_res2;
557     ch->r_io[ATA_CONTROL].offset = offset + 0x0238 + (ch->unit << 7);
558     ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2;
561 	((ctlr->chip->cfg2 & (PR_CMBO | PR_CMBO2)) && ch->unit < 2)) {
562 	ch->r_io[ATA_SSTATUS].res = ctlr->r_res2;
563 	ch->r_io[ATA_SSTATUS].offset = 0x400 + (ch->unit << 8);
564 	ch->r_io[ATA_SERROR].res = ctlr->r_res2;
565 	ch->r_io[ATA_SERROR].offset = 0x404 + (ch->unit << 8);
566 	ch->r_io[ATA_SCONTROL].res = ctlr->r_res2;
567 	ch->r_io[ATA_SCONTROL].offset = 0x408 + (ch->unit << 8);
568 	ch->flags |= ATA_NO_SLAVE;
569 	ch->flags |= ATA_SATA;
571     ch->flags |= ATA_USE_16BIT;
572     ch->flags |= ATA_CHECKS_CABLE;
576 	ch->hw.command = ata_promise_sx4_command;
579 	ch->hw.command = ata_promise_mio_command;
580 	ch->hw.status = ata_promise_mio_status;
581 	ch->hw.softreset = ata_promise_mio_softreset;
582 	ch->hw.pm_read = ata_promise_mio_pm_read;
583 	ch->hw.pm_write = ata_promise_mio_pm_write;
600     struct ata_channel *ch;
614 	if ((ch = ctlr->interrupt[unit].argument))
615 	    ctlr->interrupt[unit].function(ch);
625     struct ata_channel *ch = device_get_softc(dev);
646     ATA_OUTL(ctlr->r_res2, stat_reg, status & (0x00000011 << ch->unit));
649     if (status & (0x00000001 << ch->unit)) {
652 	taskqueue_enqueue(taskqueue_thread, &ch->conntask);
656     if (status & (0x00000010 << ch->unit)) {
659 	taskqueue_enqueue(taskqueue_thread, &ch->conntask);
663     return (vector & (1 << (ch->unit + 1)));
670     struct ata_channel *ch = device_get_softc(request->parent);
672     u_int32_t *wordp = (u_int32_t *)ch->dma.work;
674     ATA_OUTL(ctlr->r_res2, (ch->unit + 1) << 2, 0x00000001);
677         ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) {
679 	ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), request->unit & 0x0f);
689 	wordp[0] = htole32(0x04 | ((ch->unit + 1) << 16) | (0x00 << 24));
694 	wordp[0] = htole32(0x00 | ((ch->unit + 1) << 16) | (0x00 << 24));
701     ATA_OUTL(ctlr->r_res2, 0x0240 + (ch->unit << 7), ch->dma.work_bus);
709     struct ata_channel *ch = device_get_softc(dev);
717 	ATA_OUTL(ctlr->r_res2, 0xc0260 + (ch->unit << 7), ch->unit + 1);
719 	ATA_OUTL(ctlr->r_res2, 0xc0260 + (ch->unit << 7),
720 		 (ATA_INL(ctlr->r_res2, 0xc0260 + (ch->unit << 7)) &
721 		  ~0x00003f9f) | (ch->unit + 1));
739 	    ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2))) {
742 	    ATA_OUTL(ctlr->r_res2, 0x06c, (0x00110000 << ch->unit));
746 	ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), (1 << 11));
748 	ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7),
749 		 (ATA_INL(ctlr->r_res2, 0x0260 + (ch->unit << 7)) &
750 		  ~0x00003f9f) | (ch->unit + 1));
753 	    ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2))) {
758 		ch->devices = 0;
761 	    ATA_OUTL(ctlr->r_res2, 0x06c, (0x00000011 << ch->unit));
770 	    ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) {
772 	    //ATA_OUTL(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x0f);
775 	    ATA_OUTL(ctlr->r_res2, 0x060, (0x00110000 << ch->unit));
779 	ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7), (1 << 11));
781 	ATA_OUTL(ctlr->r_res2, 0x0260 + (ch->unit << 7),
782 		 (ATA_INL(ctlr->r_res2, 0x0260 + (ch->unit << 7)) &
783 		  ~0x00003f9f) | (ch->unit + 1));
786 	    ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2))) {
789 	    ATA_OUTL(ctlr->r_res2, 0x414 + (ch->unit << 8),
790 		     (ATA_INL(ctlr->r_res2, 0x414 + (ch->unit << 8)) &
794 		u_int32_t signature = ch->hw.softreset(dev, ATA_PM);
801 		    ch->devices = ATA_ATA_MASTER;
804 		    ch->devices = ATA_PORTMULTIPLIER;
808 		    ch->devices = ATA_ATAPI_MASTER;
814 		    ch->devices = ATA_ATA_MASTER;
818 		    		  ch->devices);
821 		ch->devices = 0;
824 	    ATA_OUTL(ctlr->r_res2, 0x060, (0x00000011 << ch->unit));
827 	    ATA_OUTL(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x00);
840     struct ata_channel *ch = device_get_softc(dev);
844 	*result = ATA_IDX_INL(ch, reg);
863     ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x0f);
865     ATA_IDX_OUTB(ch, ATA_FEATURE, reg);
866     ATA_IDX_OUTB(ch, ATA_DRIVE, port);
868     ATA_IDX_OUTB(ch, ATA_COMMAND, ATA_READ_PM);
871 	u_int8_t status = ATA_IDX_INB(ch, ATA_STATUS);
880     *result = ATA_IDX_INB(ch, ATA_COUNT) |
881 	      (ATA_IDX_INB(ch, ATA_SECTOR) << 8) |
882 	      (ATA_IDX_INB(ch, ATA_CYL_LSB) << 16) |
883 	      (ATA_IDX_INB(ch, ATA_CYL_MSB) << 24);
891     struct ata_channel *ch = device_get_softc(dev);
895 	ATA_IDX_OUTL(ch, reg, value);
914     ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), 0x0f);
916     ATA_IDX_OUTB(ch, ATA_FEATURE, reg);
917     ATA_IDX_OUTB(ch, ATA_DRIVE, port);
918     ATA_IDX_OUTB(ch, ATA_COUNT, value & 0xff);
919     ATA_IDX_OUTB(ch, ATA_SECTOR, (value >> 8) & 0xff);
920     ATA_IDX_OUTB(ch, ATA_CYL_LSB, (value >> 16) & 0xff);
921     ATA_IDX_OUTB(ch, ATA_CYL_MSB, (value >> 24) & 0xff);
923     ATA_IDX_OUTB(ch, ATA_COMMAND, ATA_WRITE_PM);
926 	u_int8_t status = ATA_IDX_INB(ch, ATA_STATUS);
935     return ATA_IDX_INB(ch, ATA_ERROR);
943     struct ata_channel *ch = device_get_softc(dev);
947     ATA_OUTB(ctlr->r_res2, 0x4e8 + (ch->unit << 8), port & 0x0f);
950     ATA_IDX_OUTB(ch, ATA_DRIVE, ATA_D_IBM | ATA_D_LBA | ATA_DEV(ATA_MASTER));
952     ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_IDS | ATA_A_RESET);
954     ATA_IDX_OUTB(ch, ATA_CONTROL, ATA_A_IDS);
956     ATA_IDX_INB(ch, ATA_ERROR);
962 	/* err = */ ATA_IDX_INB(ch, ATA_ERROR);
963 	stat = ATA_IDX_INB(ch, ATA_STATUS);
970 		return ATA_IDX_INB(ch, ATA_COUNT) |
971 		       (ATA_IDX_INB(ch, ATA_SECTOR) << 8) |
972 		       (ATA_IDX_INB(ch, ATA_CYL_LSB) << 16) |
973 		       (ATA_IDX_INB(ch, ATA_CYL_MSB) << 24);
990     struct ata_channel *ch = device_get_softc(dev);
993     ch->dma.setprd = ata_promise_mio_setprd;
994     ch->dma.max_iosize = 65536;
1031         struct ata_channel *ch = device_get_softc(dev);
1034     	    ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2)) ||
1036 	    ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2)))
1047         struct ata_channel *ch = device_get_softc(dev);
1050     	    ((ctlr->chip->cfg2 == PR_CMBO) && (ch->unit < 2)) ||
1052 	    ((ctlr->chip->cfg2 == PR_CMBO2) && (ch->unit < 2)))
1062     struct ata_channel *ch;
1068 	    if ((ch = ctlr->interrupt[unit].argument))
1069 		ctlr->interrupt[unit].function(ch);
1071 	    if ((ch = ctlr->interrupt[unit].argument))
1073 				       htole32((ch->unit * ATA_PDC_CHN_OFFSET) +
1077 	    if ((ch = ctlr->interrupt[unit].argument))
1078 		ctlr->interrupt[unit].function(ch);
1082 	    if ((ch = ctlr->interrupt[unit].argument))
1083 		ATA_OUTL(ctlr->r_res2, 0x000c0240 + (ch->unit << 7),
1084 			 htole32((ch->unit * ATA_PDC_CHN_OFFSET) +
1095     struct ata_channel *ch = device_get_softc(request->parent);
1116 	ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit + 1) << 2), 0x00000001);
1125 	    (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_APKT_OFFSET);
1126 	wordp[0] = htole32(0x08 | ((ch->unit + 1)<<16) | (0x00 << 24));
1131 	ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit + 1) << 2), 0x00000001);
1132 	ATA_OUTL(ctlr->r_res2, 0x000c0240 + (ch->unit << 7),
1133 		 htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_APKT_OFFSET));
1142 	    (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_HSG_OFFSET);
1151 	    (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_LSG_OFFSET);
1152 	wordp[0] = htole32((ch->unit * ATA_PDC_BUF_OFFSET) + ATA_PDC_BUF_BASE);
1156 	    (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_ASG_OFFSET);
1157 	wordp[0] = htole32((ch->unit * ATA_PDC_BUF_OFFSET) + ATA_PDC_BUF_BASE);
1161 	    (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_HPKT_OFFSET);
1163 	    wordp[0] = htole32(0x14 | ((ch->unit+9)<<16) | ((ch->unit+5)<<24));
1165 	    wordp[0] = htole32(0x00 | ((ch->unit+13)<<16) | (0x00<<24));
1166 	wordp[1] = htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_HSG_OFFSET);
1167 	wordp[2] = htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_LSG_OFFSET);
1171 	    (window + (ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_APKT_OFFSET);
1173 	    wordp[0] = htole32(0x04 | ((ch->unit+5)<<16) | (0x00<<24));
1175 	    wordp[0] = htole32(0x10 | ((ch->unit+1)<<16) | ((ch->unit+13)<<24));
1176 	wordp[1] = htole32((ch->unit * ATA_PDC_CHN_OFFSET)+ATA_PDC_ASG_OFFSET);
1182 	    ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+5)<<2), 0x00000001);
1183 	    ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+9)<<2), 0x00000001);
1184 	    ATA_OUTL(ctlr->r_res2, 0x000c0240 + (ch->unit << 7),
1185 		htole32((ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_APKT_OFFSET));
1188 	    ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+1)<<2), 0x00000001);
1189 	    ATA_OUTL(ctlr->r_res2, 0x000c0400 + ((ch->unit+13)<<2), 0x00000001);
1191 		htole32((ch->unit * ATA_PDC_CHN_OFFSET) + ATA_PDC_HPKT_OFFSET));