ata/chipsets/ata-intel.c

93 #define ATA_INTEL_SMAP(ctlr, ch) \
94     &((struct ata_intel_data *)((ctlr)->chipset_data))->smap[(ch)->unit * 2]
312 	struct ata_channel *ch;
321 	ch = device_get_softc(dev);
325 		ch->r_io[ATA_IDX_ADDR].res = ctlr->r_res2;
326 		ch->r_io[ATA_IDX_ADDR].offset = 0x00;
327 		ch->r_io[ATA_IDX_DATA].res = ctlr->r_res2;
328 		ch->r_io[ATA_IDX_DATA].offset = 0x04;
331 	ch->flags |= ATA_ALWAYS_DMASTAT;
333 		smap = ATA_INTEL_SMAP(ctlr, ch);
338 				ch->flags |= ATA_SATA;
339 				ch->flags |= ATA_NO_SLAVE;
340 				smap[0] = (map & 0x01) ^ ch->unit;
342 			} else if ((map & 0x02) == 0 && ch->unit == 0) {
343 				ch->flags |= ATA_SATA;
346 			} else if ((map & 0x02) != 0 && ch->unit == 1) {
347 				ch->flags |= ATA_SATA;
352 			ch->flags |= ATA_SATA;
353 			ch->flags |= ATA_NO_SLAVE;
354 			smap[0] = (ch->unit == 0) ? 0 : 1;
359 				ch->flags |= ATA_SATA;
360 				smap[0] = (ch->unit == 0) ? 0 : 1;
361 				smap[1] = (ch->unit == 0) ? 2 : 3;
362 			} else if (map == 0x02 && ch->unit == 0) {
363 				ch->flags |= ATA_SATA;
366 			} else if (map == 0x01 && ch->unit == 1) {
367 				ch->flags |= ATA_SATA;
372 		if (ch->flags & ATA_SATA) {
374 				ch->hw.pm_read = ata_intel_sata_cscr_read;
375 				ch->hw.pm_write = ata_intel_sata_cscr_write;
378 					ch->hw.pm_read = ata_intel_sata_ahci_read;
379 					ch->hw.pm_write = ata_intel_sata_ahci_write;
381 					ch->hw.pm_read = ata_intel_sata_sidpr_read;
382 					ch->hw.pm_write = ata_intel_sata_sidpr_write;
385 			if (ch->hw.pm_write != NULL) {
386 				ch->flags |= ATA_PERIODIC_POLL;
387 				ch->hw.status = ata_intel_sata_status;
388 				ata_sata_scr_write(ch, 0,
390 				if ((ch->flags & ATA_NO_SLAVE) == 0) {
391 					ata_sata_scr_write(ch, 1,
398 			ch->flags |= ATA_USE_16BIT;
400 		ch->flags |= ATA_CHECKS_CABLE;
409 	struct ata_channel *ch = device_get_softc(dev);
415 	if ((ch->flags & ATA_SATA) == 0)
419 	smap = ATA_INTEL_SMAP(ctlr, ch);
421 	if ((ch->flags & ATA_NO_SLAVE) == 0)
436 		if ((pcs == mask) && (ATA_IDX_INB(ch, ATA_STATUS) != 0xff))
444 	if (ch->hw.pm_read != NULL) {
446 		if ((ch->flags & ATA_NO_SLAVE) == 0)
451 		if ((ch->flags & ATA_NO_SLAVE) == 0)
458 		ch->devices &= (devs | (devs * ATA_ATAPI_MASTER));
460 		ch->devices = 0;
478 	struct ata_channel *ch = device_get_softc(dev);
479 	int devno = (ch->unit << 1) + target;
494 	if (ch->flags & ATA_SATA)
535 	if (ch->unit) {
578 	struct ata_channel *ch = device_get_softc(dev);
581 	if (ata_sata_scr_read(ch, target, ATA_SSTATUS, &status) == 0)
589 	struct ata_channel *ch = device_get_softc(dev);
592 	if ((ch->flags & ATA_NO_SLAVE) == 0)
602 	struct ata_channel *ch;
609 	ch = device_get_softc(dev);
611 	smap = ATA_INTEL_SMAP(ctlr, ch);
634 	struct ata_channel *ch;
640 	ch = device_get_softc(dev);
641 	smap = ATA_INTEL_SMAP(ctlr, ch);
668 	struct ata_channel *ch;
673 	ch = device_get_softc(dev);
689 	ATA_IDX_OUTL(ch, ATA_IDX_ADDR, ((ch->unit * 2 + port) << 8) + reg);
690 	*result = ATA_IDX_INL(ch, ATA_IDX_DATA);
699 	struct ata_channel *ch;
706 	ch = device_get_softc(dev);
708 	smap = ATA_INTEL_SMAP(ctlr, ch);
731 	struct ata_channel *ch;
737 	ch = device_get_softc(dev);
738 	smap = ATA_INTEL_SMAP(ctlr, ch);
765 	struct ata_channel *ch;
770 	ch = device_get_softc(dev);
786 	ATA_IDX_OUTL(ch, ATA_IDX_ADDR, ((ch->unit * 2 + port) << 8) + reg);
787 	ATA_IDX_OUTL(ch, ATA_IDX_DATA, value);
795 	struct ata_channel *ch = device_get_softc(dev);
799 	port = (ch->flags & ATA_NO_SLAVE) ? 0 : 1;
822     struct ata_channel *ch = device_get_softc(dev);
828     ch_offset = 0x200 + ch->unit * 0x200;
831 	ch->r_io[i].res = ctlr->r_res2;
834     ch->r_io[ATA_DATA].offset = ch_offset + 0x00;
835     ch->r_io[ATA_FEATURE].offset = ch_offset + 0x06;
836     ch->r_io[ATA_COUNT].offset = ch_offset + 0x08;
837     ch->r_io[ATA_SECTOR].offset = ch_offset + 0x0c;
838     ch->r_io[ATA_CYL_LSB].offset = ch_offset + 0x10;
839     ch->r_io[ATA_CYL_MSB].offset = ch_offset + 0x14;
840     ch->r_io[ATA_DRIVE].offset = ch_offset + 0x18;
841     ch->r_io[ATA_COMMAND].offset = ch_offset + 0x1d;
842     ch->r_io[ATA_ERROR].offset = ch_offset + 0x04;
843     ch->r_io[ATA_STATUS].offset = ch_offset + 0x1c;
844     ch->r_io[ATA_ALTSTAT].offset = ch_offset + 0x28;
845     ch->r_io[ATA_CONTROL].offset = ch_offset + 0x29;
848     ch->r_io[ATA_SSTATUS].offset = ch_offset + 0x100;
849     ch->r_io[ATA_SERROR].offset = ch_offset + 0x104;
850     ch->r_io[ATA_SCONTROL].offset = ch_offset + 0x108;
853     ch->r_io[ATA_BMCMD_PORT].offset = ch_offset + 0x70;
854     ch->r_io[ATA_BMSTAT_PORT].offset = ch_offset + 0x72;
855     ch->r_io[ATA_BMDTP_PORT].offset = ch_offset + 0x74;
857     ch->flags |= ATA_NO_SLAVE;
858     ch->flags |= ATA_SATA;
860     ch->hw.status = ata_intel_31244_status;
861     ch->hw.tf_write = ata_intel_31244_tf_write;
865 	     ATA_INL(ctlr->r_res2, 0x04) | (0x01 << (ch->unit << 3)));
890     struct ata_channel *ch = device_get_softc(request->parent);
893 	ATA_IDX_OUTW(ch, ATA_FEATURE, request->u.ata.feature);
894 	ATA_IDX_OUTW(ch, ATA_COUNT, request->u.ata.count);
895 	ATA_IDX_OUTW(ch, ATA_SECTOR, ((request->u.ata.lba >> 16) & 0xff00) |
897 	ATA_IDX_OUTW(ch, ATA_CYL_LSB, ((request->u.ata.lba >> 24) & 0xff00) |
899 	ATA_IDX_OUTW(ch, ATA_CYL_MSB, ((request->u.ata.lba >> 32) & 0xff00) |
901 	ATA_IDX_OUTW(ch, ATA_DRIVE, ATA_D_LBA | ATA_DEV(request->unit));
904 	ATA_IDX_OUTB(ch, ATA_FEATURE, request->u.ata.feature);
905 	ATA_IDX_OUTB(ch, ATA_COUNT, request->u.ata.count);
906 	    ATA_IDX_OUTB(ch, ATA_SECTOR, request->u.ata.lba);
907 	    ATA_IDX_OUTB(ch, ATA_CYL_LSB, request->u.ata.lba >> 8);
908 	    ATA_IDX_OUTB(ch, ATA_CYL_MSB, request->u.ata.lba >> 16);
909 	    ATA_IDX_OUTB(ch, ATA_DRIVE,
918     struct ata_channel *ch = device_get_softc(dev);
923 	ch->devices = 0;