contrib/octeon-sdk/cvmx-smix-defs.h

55 static inline uint64_t CVMX_SMIX_CLK(unsigned long offset)
63 			if ((offset == 0))
64 				return CVMX_ADD_IO_SEG(0x0001180000001818ull) + ((offset) & 0) * 256;
72 			if ((offset <= 1))
73 				return CVMX_ADD_IO_SEG(0x0001180000001818ull) + ((offset) & 1) * 256;
76 			if ((offset <= 3))
77 				return CVMX_ADD_IO_SEG(0x0001180000003818ull) + ((offset) & 3) * 128;
80 	cvmx_warn("CVMX_SMIX_CLK (offset = %lu) not supported on this chip\n", offset);
81 	return CVMX_ADD_IO_SEG(0x0001180000001818ull) + ((offset) & 1) * 256;
83 static inline uint64_t CVMX_SMIX_CMD(unsigned long offset)
91 			if ((offset == 0))
92 				return CVMX_ADD_IO_SEG(0x0001180000001800ull) + ((offset) & 0) * 256;
100 			if ((offset <= 1))
101 				return CVMX_ADD_IO_SEG(0x0001180000001800ull) + ((offset) & 1) * 256;
104 			if ((offset <= 3))
105 				return CVMX_ADD_IO_SEG(0x0001180000003800ull) + ((offset) & 3) * 128;
108 	cvmx_warn("CVMX_SMIX_CMD (offset = %lu) not supported on this chip\n", offset);
109 	return CVMX_ADD_IO_SEG(0x0001180000001800ull) + ((offset) & 1) * 256;
111 static inline uint64_t CVMX_SMIX_EN(unsigned long offset)
119 			if ((offset == 0))
120 				return CVMX_ADD_IO_SEG(0x0001180000001820ull) + ((offset) & 0) * 256;
128 			if ((offset <= 1))
129 				return CVMX_ADD_IO_SEG(0x0001180000001820ull) + ((offset) & 1) * 256;
132 			if ((offset <= 3))
133 				return CVMX_ADD_IO_SEG(0x0001180000003820ull) + ((offset) & 3) * 128;
136 	cvmx_warn("CVMX_SMIX_EN (offset = %lu) not supported on this chip\n", offset);
137 	return CVMX_ADD_IO_SEG(0x0001180000001820ull) + ((offset) & 1) * 256;
139 static inline uint64_t CVMX_SMIX_RD_DAT(unsigned long offset)
147 			if ((offset == 0))
148 				return CVMX_ADD_IO_SEG(0x0001180000001810ull) + ((offset) & 0) * 256;
156 			if ((offset <= 1))
157 				return CVMX_ADD_IO_SEG(0x0001180000001810ull) + ((offset) & 1) * 256;
160 			if ((offset <= 3))
161 				return CVMX_ADD_IO_SEG(0x0001180000003810ull) + ((offset) & 3) * 128;
164 	cvmx_warn("CVMX_SMIX_RD_DAT (offset = %lu) not supported on this chip\n", offset);
165 	return CVMX_ADD_IO_SEG(0x0001180000001810ull) + ((offset) & 1) * 256;
167 static inline uint64_t CVMX_SMIX_WR_DAT(unsigned long offset)
175 			if ((offset == 0))
176 				return CVMX_ADD_IO_SEG(0x0001180000001808ull) + ((offset) & 0) * 256;
184 			if ((offset <= 1))
185 				return CVMX_ADD_IO_SEG(0x0001180000001808ull) + ((offset) & 1) * 256;
188 			if ((offset <= 3))
189 				return CVMX_ADD_IO_SEG(0x0001180000003808ull) + ((offset) & 3) * 128;
192 	cvmx_warn("CVMX_SMIX_WR_DAT (offset = %lu) not supported on this chip\n", offset);
193 	return CVMX_ADD_IO_SEG(0x0001180000001808ull) + ((offset) & 1) * 256;